nand_config Summary

Base Address: 0xFFB80000

Register Address Offset	Bit Fields
`i_nand_config`
`transfer_spare_reg` `0x10`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`load_wait_cnt` `0x20`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x1F4`
`program_wait_cnt` `0x30`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x1F40`
`erase_wait_cnt` `0x40`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x1F40`
`int_mon_cyccnt` `0x50`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x1F4`
`rb_pin_enabled` `0x60`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`bank3` `RW 0x0`	`bank2` `RW 0x0`	`bank1` `RW 0x0`	`bank0` `RW 0x1`
`multiplane_operation` `0x70`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`multiplane_read_enable` `0x80`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`copyback_disable` `0x90`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`cache_write_enable` `0xA0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`cache_read_enable` `0xB0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`prefetch_mode` `0xC0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`prefetch_burst_length` `RW 0x0`												`Reserved`			`prefetch_en` `RW 0x1`
`chip_enable_dont_care` `0xD0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`ecc_enable` `0xE0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x1`
`global_int_enable` `0xF0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`error_rpt_disable` `RW 0x0`	`Reserved`			`timeout_disable` `RW 0x0`	`Reserved`			`flag` `RW 0x0`
`twhr2_and_we_2_re` `0x100`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`		`twhr2` `RW 0x14`						`Reserved`		`we_2_re` `RW 0x32`
`tcwaw_and_addr_2_data` `0x110`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`		`tcwaw` `RW 0x14`						`Reserved`	`addr_2_data` `RW 0x32`
`re_2_we` `0x120`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`										`value` `RW 0x32`
`acc_clks` `0x130`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`value` `RW 0x0`
`number_of_planes` `0x140`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`													`value` `RW 0x0`
`pages_per_block` `0x150`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x0`
`device_width` `0x160`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`value` `RW 0x3`
`device_main_area_size` `0x170`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x0`
`device_spare_area_size` `0x180`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x0`
`two_row_addr_cycles` `0x190`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`four` `RW 0x0`	`Reserved`			`flag` `RW 0x0`
`multiplane_addr_restrict` `0x1A0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x0`
`ecc_correction` `0x1B0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`erase_threshold` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`value` `RW 0x8`
`read_mode` `0x1C0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`value` `RW 0x0`
`write_mode` `0x1D0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`value` `RW 0x0`
`copyback_mode` `0x1E0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`value` `RW 0x0`
`rdwr_en_lo_cnt` `0x1F0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`value` `RW 0x12`
`rdwr_en_hi_cnt` `0x200`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`											`value` `RW 0xC`
`max_rd_delay` `0x210`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`value` `RW 0x0`
`cs_setup_cnt` `0x220`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`twb` `RW 0xA`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`twb` `RW 0xA`				`Reserved`							`value` `RW 0x3`
`spare_area_skip_bytes` `0x230`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`										`value` `RW 0x0`
`spare_area_marker` `0x240`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0xFFFF`
`devices_connected` `0x250`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`													`value` `RW 0x0`
`die_mask` `0x260`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x0`
`first_block_of_next_plane` `0x270`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x1`
`write_protect` `0x280`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`flag` `RW 0x1`
`re_2_re` `0x290`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`										`value` `RW 0x32`
`por_reset_count` `0x2A0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x13B`
`watchdog_reset_count` `0x2B0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`value` `RW 0x5B9A`
`device_reset` `0x0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`bank3` `RW 0x0`	`bank2` `RW 0x0`	`bank1` `RW 0x0`	`bank0` `RW 0x0`