CCU_DMI1 Address Map
Module Instance | Base Address | End Address |
---|---|---|
i_ccu__DSU__1c000000__CCU_DMI1
|
0x1C008000
|
0x1C008FFF
|
Register | Offset | Width | Access | Reset Value | Description |
---|---|---|---|---|---|
DMIUIDR
|
0x0
|
32
|
RO
|
0x80001008
|
DMIU Identification Register |
DMIUFUIDR
|
0x4
|
32
|
RO
|
0x00000008
|
DMIU Fabric Unit Identification Register |
DMIUTAR
|
0x44
|
32
|
RO
|
0x00000000
|
DMIU Transaction Activity Register |
DMIUUEDR
|
0x100
|
32
|
RO
|
0x00000000
|
DMIU Uncorrectable Error Detect Register |
DMIUUEIR
|
0x104
|
32
|
RO
|
0x00000000
|
DMIU Uncorrectable Error Interrupt Register |
DMIUUESR
|
0x108
|
32
|
RO
|
0x00000000
|
DMIU Uncorrectable Error Status Register |
DMIUUELR0
|
0x10C
|
32
|
RW
|
0x00000000
|
DMIU Uncorrectable Error Location Registers 0 |
DMIUUELR1
|
0x110
|
32
|
RO
|
0x00000000
|
DMIU Uncorrectable Error Location Registers 1 |
DMIUUESAR
|
0x114
|
32
|
RW
|
0x00000000
|
DMIU Uncorrectable Error Status Alias Register |
DMIUCECR
|
0x140
|
32
|
RO
|
0x00000000
|
DMIU Correctable Error Control Register |
DMIUCESR
|
0x144
|
32
|
RO
|
0x00000000
|
DMIU Correctable Error Status Register |
DMIUCELR0
|
0x148
|
32
|
RW
|
0x00000000
|
DMIU Correctable Error Location Registers 0 |
DMIUCELR1
|
0x14C
|
32
|
RO
|
0x00000000
|
DMIU Correctable Error Location Registers 1 |
DMIUCESAR
|
0x150
|
32
|
RW
|
0x00000000
|
DMIU Correctable Error Status Alias Register |
DMIUTOCR
|
0x190
|
32
|
RW
|
0x00004000
|
Timeout Control Register |
DMIUQOSCR0
|
0x200
|
32
|
RO
|
0x00000040
|
QoS Control Register |
DMIUSMCTCR
|
0x300
|
32
|
RO
|
0x00000000
|
DMIU System Memory Cache Transaction Control Register |
DMIUSMCTAR
|
0x304
|
32
|
RO
|
0x00000000
|
DMIU System Memory Cache Transaction Activity Register |
DMIUSMCAPR
|
0x308
|
32
|
RO
|
0x00000000
|
DMIU System Memory Cache Allocation Policy Register |
DMIUSMCISR
|
0x30C
|
32
|
RO
|
0x00000000
|
DMIU System Memory Cache Initializtion Status Register |
DMIUSMCMCR
|
0x340
|
32
|
RO
|
0x00000000
|
DMIU System Memory Cache Maintenance Control Register |
DMIUSMCMAR
|
0x344
|
32
|
RO
|
0x00000000
|
DMIU System Memory Cache Maintenance Activity Register |
DMIUSMCMLR0
|
0x348
|
32
|
RW
|
0x00000000
|
DMIU System Memory Cache Maintenance Location Register 0 |
DMIUSMCMLR1
|
0x34C
|
32
|
RW
|
0x00000000
|
DMIU System Memory Cache Maintenance Location Register 1 |
DMIUSMCMDR
|
0x350
|
32
|
RW
|
0x00000000
|
DMIU System Memory Cache Maintenance Data Register |
DMICCTRLR
|
0x800
|
32
|
RW
|
0x10020000
|
AIU Unit Capture Control Register |
DMICNTCR0
|
0xB00
|
32
|
RO
|
0x00000000
|
PMON Counter Control Register |
DMICNTVR0
|
0xB04
|
32
|
RW
|
0x00000000
|
PMON Counter Value Register Register |
DMICNTSR0
|
0xB08
|
32
|
RW
|
0x00000000
|
PMON Counter Saturation Register |
DMICNTCR1
|
0xB10
|
32
|
RO
|
0x00000000
|
PMON Counter Control Register |
DMICNTVR1
|
0xB14
|
32
|
RW
|
0x00000000
|
PMON Counter Value Register Register |
DMICNTSR1
|
0xB18
|
32
|
RW
|
0x00000000
|
PMON Counter Saturation Register |
DMICNTCR2
|
0xB20
|
32
|
RO
|
0x00000000
|
PMON Counter Control Register |
DMICNTVR2
|
0xB24
|
32
|
RW
|
0x00000000
|
PMON Counter Value Register Register |
DMICNTSR2
|
0xB28
|
32
|
RW
|
0x00000000
|
PMON Counter Saturation Register |
DMICNTCR3
|
0xB30
|
32
|
RO
|
0x00000000
|
PMON Counter Control Register |
DMICNTVR3
|
0xB34
|
32
|
RW
|
0x00000000
|
PMON Counter Value Register Register |
DMICNTSR3
|
0xB38
|
32
|
RW
|
0x00000000
|
PMON Counter Saturation Register |
DMIUEVIDR
|
0xFF4
|
32
|
RO
|
0xB92A000B
|
DMIU Engineering Version Id Register |
DMIUSMCIFR
|
0xFF8
|
32
|
RO
|
0x00F0001F
|
DMIU System Memory Cache Information Register |
DMIUINFOR
|
0xFFC
|
32
|
RO
|
0x80309323
|
DMIU Information Register |