Intel High Level Synthesis Compiler: Version 19.1 Release Notes
Intel High Level Synthesis Compiler Version 19.1 Release Notes
The Intel® High Level Synthesis Compiler Release Notes provide late-breaking information about the Intel® High Level Synthesis Compiler Version 19.1.
New Features and Enhancements
-
The
Intel® HLS Compiler is now available
as separately installable component.
You can add the standalone Intel® HLS Compiler Version 19.1 component to an existing Intel® Quartus® Prime Pro Edition V19.1, V18.1.1, V18.0.1, or V17.1.1 installation.
- Added system of tasks to allow expression of thread-level parallelism within your HLS components.
- Added System Viewer report to show overview of your full HLS system, including components and associated tasks.
- Added a new memory attribute so that you can specify whether a memory system should be implemented in M20Ks or MLABs. By default, the compiler now implements memory systems as AUTO.
-
Expanded
support for memory attributes:
- Memory attributes can now be applied to constant memories (memories with loads only). This enables the creation of multi-ported ROMs, and forcing ROMs into LUTs.
- Memory attributes can now be applied to a member of a struct.
- Memory attributes can now be applied to HLS slave memories.
-
Improved
control of array private copies.
Use the hls_max_concurrency attribute to request fewer private copies than the loop concurrency.
- Added new component attributes to set component target clock rate and component initialization interval (II).
- Added ability to disable Hyper-Optimized Handshaking for Intel® Stratix® 10 designs.
- Added ability to control the number of speculated loop iterations launched.
-
Enhanced High Level Design Reports with new reports:
- The Block Viewer shows clusters created by the compiler along with the logic that surrounds each cluster.
- The Cluster Viewer shows the details of a cluster including instructions and instruction dependencies.
- The Fmax/II Report lists key performance metrics or indicators for all basic blocks in your component, including scheduled fMAX, sustainable II, block latency, and maximum interleaving iterations.
- The Function Memory Viewer enhances and replaces the Component Memory Viewer with expanded reporting for arrays and improved logical and physical views of your memories in your component.
-
Improved automatic compiler behavior:
- Stall-free port sharing of on-chip memory ports.
- Duplication of arrays for loop unrolling or function inlining.
- Dot-product size optimization by FPGA family architecture.
- Disabled automatic loop unrolling.
- Added support for ac_complex datatypes
- Added support for the creation of HLS libraries from RTL source files. HLS components can use functions defined in these libraries without needing to know the underlying RTL code.
- Intel® HLS Compiler Standard Edition Version 19.1 is not available.
Intel High Level Synthesis Compiler Prerequisites
For detailed instructions about installing Intel® Quartus® Prime software, including system requirements, prerequisites, and licensing requirements, see Intel® FPGA Software Installation and Licensing .
The Intel® HLS Compiler requires the following software in addition to Intel® Quartus® Prime:
C++ Compiler
-
GCC compiler and C++
Libraries version 5.4.0
You must install these libraries manually. See Installing the Intel® HLS Compiler on Linux Systems for instructions.
-
GCC
compiler and C++ Libraries version
4.4.7
These libraries are included in the version of Linux supported by the Intel® HLS Compiler.
- Microsoft Visual Studio 2015 Professional
- Microsoft Visual Studio 2015 Community
- Microsoft Visual Studio 2010 Professional
Mentor Graphics* ModelSim* Software
- ModelSim* - Intel® FPGA Edition
- ModelSim* - Intel® FPGA Starter Edition
On Linux systems, ModelSim* software requires the Red Hat development tools packages. Additionally, any 32-bit versions of ModelSim* software (including those provided with Intel® Quartus® Prime) require additional 32-bit libraries. The commands to install these requirements are provided in Installing the Intel® HLS Compiler on Linux Systems.
For information about all the ModelSim* software versions that the Intel® software supports, refer to the EDA Interface Information section in the Software and Device Support Release Notes for your edition of Intel® Quartus® Prime
Known Issues and Workarounds
This section provides information about known issues that affect the Intel® High Level Synthesis Compiler Version 19.1.
| Description | Workaround |
|---|---|
|
(Windows only) Compiling a design in a directory with a long path name can result in compile failures. |
Compile the design in a directory with a short path name. |
| (Windows only) A long path for your Intel® Quartus® Prime installation directory can prevent you from successfully compiling and running the Intel® HLS Compiler tutorials and example designs. | Move the tutorials and examples to a short path name before trying to run them. |
| When you use the -c command option to have separate compilation and linking stages in your workflow, and if you do not specify the -march option in the linking stage (or specify a different -march option value), your linking stage might fail with or without error messages. | Ensure that you use the same -march option value for both the compilation with the -c command option stage and the linking stage. |
| The hls_memory_impl("MLAB") and hls_doublepump memory attributes cannot be simultaneously applied to the same memory. | If you want double pumped memory in your design,
use M20K memory blocks. This workaround does not reflect a restriction of the underlying hardware. |
| Applying the hls_merge memory attribute to an array declared within an unrolled or partially unrolled loop creates an unexpectedly wide memory. | Avoid using the hls_merge memory
attribute in unrolled loops. If you need to merge memories in an unrolled loop, explicitly declare an array of struct type. |
| Slave memories cannot be implemented as MLABs. They can be implemented only as M20K blocks. | N/A |
Software Issues Resolved
The following issues were corrected or otherwise resolved in the Intel® HLS Compiler Pro Edition Version 19.1.
| Customer Service Request Numbers | ||||||
|---|---|---|---|---|---|---|
| 00402868 | 00412640 | 00415384 | 11345379 | 11406453 | 11364116 | 11364838 |
| 11410991 | 11411334 | |||||
Intel High Level Synthesis Compiler Release Notes Archives
| Intel® HLS Compiler Version | User Guide |
|---|---|
| 18.1 | Intel® High Level Synthesis Compiler Version 18.1 Release Notes |
| 18.0 | Intel® High Level Synthesis Compiler Version 18.0 Release Notes |
| 17.1 | Intel® High Level Synthesis Compiler Version 17.1 Release Notes |
Document Revision History for Intel HLS Compiler Version 19.1 Release Notes
| Document Version | Intel® Quartus® Prime Version | Changes |
|---|---|---|
| 2019.06.04 | 19.1 |
|
| 2019.04.01 | 19.1 |
|