Intel High Level Synthesis Compiler Pro Edition: Version 20.2 Release Notes
Version Information
| Updated for: |
|---|
| Intel® Quartus® Prime Design Suite 20.2 |
1. Intel High Level Synthesis Compiler Pro Edition Version 20.2 Release Notes
The Intel® High Level Synthesis Compiler Pro Edition Release Notes provide late-breaking information about the Intel® High Level Synthesis Compiler Pro Edition Version 20.2.
For the most recent Standard Edition release notes, see the Intel® High Level Synthesis Compiler Standard Edition Release Notes .
About the Intel® HLS Compiler Pro Edition Documentation Library
| Title and Description | |
|---|---|
|
Release
Notes
Provide late-breaking information about the Intel® HLS Compiler. |
Link |
|
Getting Started
Guide
Get up and running with the Intel® HLS Compiler by learning how to initialize your compiler environment and reviewing the various design examples and tutorials provided with the Intel® HLS Compiler. |
Link |
|
User Guide
Provides instructions on synthesizing, verifying, and simulating intellectual property (IP) that you design for Intel FPGA products. Go through the entire development flow of your component from creating your component and testbench up to integrating your component IP into a larger system with the Intel Quartus Prime software. |
Link |
|
Reference
Manual
Provides reference information about the features supported by the Intel HLS Compiler. Find details on Intel® HLS Compiler command options, header files, pragmas, attributes, macros, declarations, arguments, and template libraries. |
Link |
|
Best Practices
Guide
Provides techniques and practices that you can apply to improve the FPGA area utilization and performance of your HLS component. Typically, you apply these best practices after you verify the functional correctness of your component. |
Link |
|
Quick
Reference
Provides a brief summary of Intel HLS Compiler declarations and attributes on a single two-sided page. |
Link |
1.1. New Features and Enhancements
The Intel® High Level Synthesis Compiler Pro Edition Version 20.2 includes the following new features:
- Added support for Intel® Agilex™ devices.
- The hls_float.h header file
now includes bfloat16 and bfloat19 aliases for hls_float<8,7> and hls_float<8,10> respectively.
On Intel® Agilex™ devices, dot products that use these data types (both the bfloat and hls_float variants) take advantage of the Intel® Agilex™ FP16/19 DSPs to provide FPGA area savings.
1.2. Changes in Software Behavior
- On Windows operating systems, pipes are now supported.
- When compiling RTL source files with
names that match terms for established RTL concepts, the
compiler now issues a warning message.
Previously, you received only an error message in debug.log
1.3. Intel High Level Synthesis Compiler Pro Edition Prerequisites
For detailed instructions about installing Intel® Quartus® Prime Pro Edition software, including system requirements, prerequisites, and licensing requirements, see Intel® FPGA Software Installation and Licensing .
The Intel® HLS Compiler requires the following software in addition to Intel® Quartus® Prime:
C++ Compiler
On Linux, Intel® HLS Compiler requires GCC 9.1.0 including the GNU C++ library and binary utilities (binutils).
This version of GCC is provided as part of your Intel® HLS Compiler installation. After installing the Intel® HLS Compiler, GCC 9.1.0 is available in <quartus_installdir>/gcc.
- Microsoft Visual Studio 2017 Professional
- Microsoft Visual Studio 2017 Community
Mentor Graphics* ModelSim* Software
- ModelSim* - Intel® FPGA Edition
- ModelSim* - Intel® FPGA Starter Edition
On RedHat Linux systems, ModelSim* software requires the Red Hat development tools packages. Additionally, any 32-bit versions of ModelSim* software (including those provided with Intel® Quartus® Prime) require additional 32-bit libraries. The commands to install these requirements are provided in Installing the Intel® HLS Compiler on Linux Systems.
On SUSE Linux systems, you must use your own licensed version of Mentor Graphics* ModelSim* software.
For information about all the ModelSim* software versions that the Intel® software supports, refer to the EDA Interface Information section in the Software and Device Support Release Notes for your edition of Intel® Quartus® Prime Pro Edition
1.4. Known Issues and Workarounds
This section provides information about known issues that affect the Intel® HLS Compiler Pro Edition Version 20.2.
| Description | Workaround |
|---|---|
|
(Windows only) Compiling a design in a directory with a long path name can result in compile failures. |
Compile the design in a directory with a short path name. |
| (Windows only) A long path for your Intel® Quartus® Prime installation directory can prevent you from successfully compiling and running the Intel® HLS Compiler tutorials and example designs. | Move the tutorials and examples to a short path name before trying to run them. |
| (Windows only) Library functions that use HLS systems of tasks the cannot be emulated. | N/A |
| Libraries that target
OpenCL*
and are
written in HLS cannot use streams or pipes as an
interface between
OpenCL*
code and the library
written in HLS. However, the library in HLS can use streams or pipes if both endpoints are within the library (for example, a stream that connects two task functions). |
N/A |
| Libraries that target OpenCL* and are written in HLS might cause OpenCL* kernels that include the library to have a more conservative incremental compilation. | N/A |
|
When developing a library, if you have a
#define
defining a value that you use later in a #pragma, the
fpga_crossgen command fails. For example, the following
code cannot be compiled by the fpga_crossgen
command:
#define unroll_factor 5
int foo(int array_size) {
int tmp[100];
int sum =0;
//pragma unroll unroll_factor
#pragma ivdep array(tmp) safelen(unroll_factor)
for (int i=0;i<array_size;i++) {
sum+=tmp[i];
}
return sum;
}
|
Use __pragma instead
of #pragma. For example, the following
compiles successfully with the fpga_crossgen
command:
#define unroll_factor 5
int foo(int array_size) {
int tmp[100];
int sum =0;
//pragma unroll unroll_factor
__pragma ivdep array(tmp) safelen(unroll_factor)
for (int i=0;i<array_size;i++) {
sum+=tmp[i];
}
return sum;
}
|
| When you use the -c command option to have separate compilation and linking stages in your workflow, and if you do not specify the -march option in the linking stage (or specify a different -march option value), your linking stage might fail with or without error messages. | Ensure that you use the same -march option value for both the compilation with the -c command option stage and the linking stage. |
| Applying the hls_merge memory attribute to an array declared within an unrolled or partially unrolled loop creates an unexpectedly wide memory. | Avoid using
the hls_merge
memory attribute in unrolled loops. If you need to merge memories in an unrolled loop, explicitly declare an array of struct type. |
|
When you apply
the hls_avalon_slave_memory_argument
attribute on an array function argument, the
compiler crashes. For example, the following code causes the compiler to crash: component void foo(hls_avalon_slave_memory_argument
(128*sizeof(int)) int A[128])
|
Use a pointer
argument instead. The two styles are
equivalent. For
example:
component void foo(hls_avalon_slave_memory_argument
(128*sizeof(int)) int *A)
|
| In the Function Memory Viewer high-level design report, some function-scoped memories might appear as "optimized away". | None. When a file contains functions that are components and functions that are not components, all function-scoped variables are listed in the Function Memory List pane, but only variables from components have information about them to show in the Function Memory View pane. |
| Some high-level design reports fail in Microsoft* Internet Explorer*. | Use one of
the following browsers to view the reports:
|
|
Using a struct of a single ac_int data type
in steaming interface that uses packets (ihc::usesPackets<true>) does
not work. For example, the
following code snippet does not
work:
// class definition
class DataType {
ac_int<155, false> data;
...
}
// stream definition
typedef ihc::stream_in<DataType,
ihc::usesPackets<true>,
ihc::usesEmpty<true>
> DataStreamIn;
|
To use this
combination in your design, obey the following
restrictions:
|
When running a high-throughput
simulation of your component using enqueue
function calls, if you do not use the ihc_hls_component_run_all function
to run the enqueued component calls after all of
the ihc_hls_enqueue calls for that
component, the following behaviors occur:
|
Ensure that you use the ihc_hls_component_run_all function after all of the ihc_hls_enqueue calls for that component to run enqueued component function calls. |
The pipe class does
not work for Windows platforms. If you compile a
component with this class on Windows systems,
you get the following
error:Error: could not find stream object used by pipe |
Use the ihc::stream class instead when working on Windows systems. |
1.5. Software Issues Resolved
The following issues were corrected or otherwise resolved in the Intel® HLS Compiler Pro Edition Version 20.2.
| Customer Service Request Numbers | ||||||
|---|---|---|---|---|---|---|
| 00495244 | 00499721 | |||||
1.6. Intel High Level Synthesis Compiler Pro Edition Release Notes Archives
1.7. Document Revision History for Intel HLS Compiler Pro Edition Version 20.2 Release Notes
| Document Version | Intel® Quartus® Prime Version | Changes |
|---|---|---|
| 2020.06.22 | 20.2 |
|