BittWare has been developing FPGA-based acceleration board solutions featuring Intel FPGAs for over two decades. In their most recent migration to the latest Intel Agilex® 7 FPGAs, BittWare is interested in providing support for oneAPI on their FPGA solutions. To do so, BittWare turned to the Open FPGA Stack (OFS) and its provided open-source oneAPI Accelerator Support Package (ASP) to enable the compilation of high-level design (HLD) application kernels on their Intel Agilex FPGA-based platforms.
Background and Challenges
Intel introduced the Intel Agilex 7 product family in 2019. Since then, the Intel Agilex product family has expanded to include several low- to high-power FPGAs and logic densities over various applications. The Intel Agilex 7 FPGA series is the original, high-performance Intel Agilex FPGA family. The FPGA series incorporates the industry’s highest-performing FPGAs, delivering approximately 2X better fabric performance per watt1 than competing latest-generation FPGAs. The new Intel Agilex FPGAs are more powerful, draw less power, and include I/O features such as PCIe* 4.0 and 5.0, targeting a broad range of bandwidth-, compute-, and memory-intensive applications.
These performance improvements give BittWare’s customers better value, whether more performance per watt for edge devices or compute density for the data center. For high-performance computing (HPC) applications, FPGAs bring application tailoring that better matches workloads to the silicon than general-purpose accelerators. Intel and BittWare collaborated to port an HPC workload from the Barcelona Supercomputing Center to the IA-840f card using oneAPI, achieving a 233X speedup. This project is featured in BittWare’s High-Performance Computing with Next-Generation Intel Agilex FPGAs on-demand webinar.
BittWare also offers resources for high-level programming tools, such as white papers with downloadable sample code. These resources show how high-level tools speed up the development process while taking advantage of the high performance of Intel Agilex 7 FPGAs.
Tools such as oneAPI provide a parallel programming language that enables the abstraction of FPGA development to improve ramp-up and debug time. Comparable to NVIDIA’s CUDA* or AMD ROCm*, oneAPI provides a parallel programming language, Data Parallel C++ (DPC++), that implements SYCL. However, Intel’s distribution of oneAPI tackles a solution to a unified programming environment, toolset, and libraries for not just GPUs but also CPUs, FPGAs, and VPUs such as Gaudi/Gaudi2 AI processors.
By utilizing oneAPI, developers less familiar with FPGA programming can benefit from the flexible and reprogrammable architecture unique to FPGAs while using familiar design languages, such as C/C++, and development environments, such as Visual Studio or Eclipse. Using high-level design flows through oneAPI also increases the portability of workloads across architectures, namely CPUs, GPUs, FPGAs, and board vendors.
BittWare, whose parent company is Molex, is a long-time Intel partner designing and manufacturing enterprise-class FPGA hardware acceleration products to enable customers to deploy their solutions quicker with lower risk. As a market leader in the FPGA acceleration industry for 20 years, BittWare has migrated from the earliest Intel Stratix® and Intel Arria® FPGAs to the latest Intel Agilex product family. When tackling their latest release of the “IA” series of Intel Agilex FPGA boards, they sought to leverage the OFS infrastructure to enable oneAPI development flows on their platform.
To ensure their boards enabled the oneAPI development flow, BittWare leveraged the latest open-source FPGA development resource and infrastructure -- OFS. OFS is the first complete hardware and software infrastructure fully open-sourced and comprises composable hardware code and up-streamed kernel code to kernel.org to enable a collaborative community of FPGA developers.
The OFS infrastructure consists of an FPGA Interface Manager (FIM), commonly called a ‘shell,’ and an Accelerator Functional Unit (AFU) region, a designated region for workload development. Using OFS, board developers can leverage the open-source infrastructure to quickly develop a tailored, customized FIM for their board based on the target application or industries. Similarly, OFS includes an open-source software framework where developers can leverage up-streamed and open-sourced kernel drivers to accelerate integration into common frameworks. The OFS infrastructure addresses the demand for FPGA acceleration boards and workloads by providing a powerful methodology for rapidly developing FPGA acceleration systems. The provided OFS hardware and software infrastructure can be leveraged as-is or rapidly customized to meet new and dynamic market requirements.
The oneAPI base toolkit that Intel provides includes a compiler and runtime environment. The compiler converts a SYCL kernel, or an FPGA application code, into a hardware circuit. This hardware circuit requires additional logic to communicate with the runtime and FPGA board peripherals. OFS provides this additional logic in the oneAPI ASP. The oneAPI ASP is included in the open-source OFS GitHub repositories and is required for compiling and running HLD application kernels on OFS-supported platforms. Corresponding technical documentation is also provided and includes a quick start guide for setting up the Intel oneAPI base toolkit on an OFS platform.
Using the provided open-source OFS repositories and documentation, BittWare could implement the oneAPI design flow (non-RTL) on their Intel Agilex devices with little additional modifications.
BittWare was the first to market with Intel Agilex FPGAs F-Series. The table below illustrates the two boards developed using the OFS infrastructure and oneAPI ASP.
Giving our customers access to powerful silicon with an easy development flow is a winning formula, especially as this latest generation Intel Agilex FPGA family has such a performance improvement. Our work with oneAPI has proven its worth for a range of users to get to market faster while retaining high performance.
How to Get Started with FPGA Acceleration Using OFS
FPGA developers can choose from BittWare’s IA-420f or IA-840f OFS-enabled boards and use the open-source documentation and source code to start building their custom workload.
The following table outlines how a developer can start FPGA-based workload development using a BittWare acceleration board.
Leverage FPGA acceleration for your workload
Step 1: Choose a board
|BittWare’s OFS-enabled boards, the IA-420f and IA-840f.
Step 2: Evaluate OFS open-source resources
|BittWare will provide the corresponding version of OFS technical documentation.
Step 3: Access open-source hardware and software code
|BittWare will provide the corresponding OFS software and hardware code. This is BittWare’s specific distribution of the OFS base code (provided by Intel).
Step 4: Develop workload using RTL or C/C++ (using oneAPI)
Follow the OFS RTL flow
OFS enables the compilation of oneAPI kernels. Utilize the oneAPI development flow and build FPGA workloads in C/C++.