Media Alert: Intel at IEEE HOST Summit 2021

Intel experts present talks and take part in panel discussions at this year’s IEEE International Symposium on Hardware Oriented Security and Trust event.




Join Intel experts for panel discussions and talks at the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), a virtual event taking place Dec.13-14. Since 2008, this symposium has served as the globally recognized event for researchers and practitioners to advance knowledge and technologies related to hardware security and assurance. Learn how Intel, together with partners and customers, is building the trusted foundation for computing in a data-centric world.

IEEE International Symposium on Hardware Oriented Security and Trust (HOST)

When: Dec. 13–14, 2021

Where: Virtual Event

Turning Art into Science: Toward Scalable Hardware Security Assurance

Computing technology continues to enrich our lives at a rapid pace. Innovations once described in science fiction are now becoming an integral part of our society, from autonomous vehicles to flying droids and home robots. Yet, these world-changing technologies enrich people’s lives only when they are secure and trustworthy. This important responsibility falls on the shoulders of hardware designers who are already juggling multiple considerations at the same time. Given there are so many ways a technology can be hacked by adversaries, hardware security assurance seems more like an art than a science to the untrained. In this talk, Jason Fung, director of offensive security research at Intel, will explore opportunities where security researchers can play a crucial role to help scale this challenge. Hardware designers can indeed build more secure technologies without first being trained to be security experts.

When: Tuesday, Dec. 14, 12:50–1:15 p.m. EST

Where: Virtual through conference platform


Post-Quantum Cryptography: Are We Ready?

Motivated by the threat posed by quantum computing to the security of most public-key algorithms currently in use, the National Institute of Standards and Technologies (NIST) started in December 2016 the Post-Quantum Cryptography (PQC) Standardization Process, a public competition for selection of public-key cryptosystems designed to resist attacks by a quantum computer. After two rounds of evaluation, NIST selected seven finalists from the 69 candidates accepted in the competition. In a few months, NIST is expected to announce the algorithms selected for standardization from the remaining candidates. This panel, moderated by Intel security researchers Daniel DinuSantosh Ghosh and Avinash Varna, will discuss the steps necessary for replacement of current public-key cryptosystems with PQC schemes in view of NIST’s announcement. Areas of interest include efficient and secure implementations of PQC in hardware and software for a large spectrum of devices, ranging from resource-constrained microcontrollers to powerful processors. The goal is to identify and discuss some of the challenges and opportunities created by the deployment of PQC for academia, government and industry.

When: Tuesday, Dec. 14, 1:50–3:15 p.m. EST

Where: Virtual through conference platform


State of Microelectronics and Security

This panel discussion on the state of security in microelectronic design and manufacturing will specifically focus on the challenges of creating secure solutions with a globally dispersed supply chain. Matthew Areno, senior principal engineer at Intel, joins experts from across the security industry representing companies that both manufacture microelectronics and provide the tools used during the manufacturing process. This will be a “can’t miss” discussion on how such challenges are being addressed today and how organizations are preparing for tomorrow.

When: Tuesday, Dec. 14, 3:30–4:55 p.m. EST

Where: Virtual through conference platform



Jennifer Foss