The triathlon is as demanding as a hobby gets. But for Intel’s Chris Auth, it’s liberating.
“Some of my best ideas come from going for a long bike ride or a long run,” he says. “A lot of problems are things you’re stuck on, sitting at your desk — I always find it incredible that I go for a run and start to work through them. And by the end of it I’ve got so many ideas.”
Auth has no shortage of challenges to tackle. As vice president of Technology Development and director of advanced transistor development at Intel, Auth manages several silicon process nodes, including 10nm, 10nm SuperFin and the recently introduced Intel 7.
A process node is a roughly 4,000-step semiconductor manufacturing recipe to transform a bare silicon wafer into several hundred individual processors, each with billions of transistors connected to each other with tiny wires called interconnects (the total length of wires in a processor can reach kilometers). Auth likens it to building a jetliner. Both, he says, are “massively complex and intricate projects that require the entire organization working together to be successful.”
More "Behind the Builders:" The Revolutions that Led to Chips Made Like Quilts (Ravi Mahajan) | Reinventing Chip Design from the Outside In (Johanna Swan)
For most people, the construction of billions of microscopic components into fingernail-sized chips is hard to grasp, but Auth explains that it’s a lot like how cities are built.
“Cities form so people can do things together and interact easier than if people were spread apart,” he says. “Transistors are the same way — we want to put them so close together so they can talk to each other and interact, to speed that information transfer.” Each chip’s architecture defines groups of transistors to complete specific functions, again just like a city.
Moore’s Law refers to the regular cadence of improved silicon performance and (especially) cost, which results from packing transistors more tightly together. As Intel continues the march to miniaturization, Auth says the company has also worked to bring even more frequent improvements in the form of “intranodes” each of the past few years.
“If you put enough small innovations together, it ends up being a fairly large innovation,” he notes. “And that’s what we did with SuperFin — we put together about 15 different things that each added about 1%. One percent by itself isn’t much, but now you add 15 of them together, now it becomes really big. And we did that again with Intel 7.”
Auth and team might need to alter only a couple dozen of those 4,000 process steps to achieve a double-digit improvement. “We spread a large net and try to capture a bunch of ideas,” Auth says, from basic research teams all the way to Intel’s production factories (called fabs) around the world. Ideas then are graded for their impact and ability to meet the desired schedule.
A “full node,” conversely, brings performance improvements and compaction, which requires more radical changes among those 4,000 steps — such as new tools, chemicals, materials, etc. The forthcoming Intel 4 node, for instance, employs extreme ultraviolet (EUV) lithography to achieve narrower lines and smaller components.
And just like training for triathlons, the work is never done. At any given time, “yield work is happening on 1,000 of those 4,000 steps, little tweaks that are imperceptible to the performance of the chip but reduce defects by a little bit here and there.”
Like the moth that famously disrupted the operation of the Mark II electromechanical computer in 1947 (the first real computer bug), individual particles from equipment, chemicals or imperfect methods cause faulty chips and lower the yield, or percentage of usable chips per wafer.
“We work to fine-tune all of that,” Auth says, “and that’s why you see yield curves continue to rise as we go along — we learn and we figure out how to do things a little bit better.”
If it sounds like a lot — multiple 4,000-step recipes, some being reinvented, the rest relentlessly improved — it is. And Auth wouldn’t have it any other way.
“I find it the most exciting thing that I could do,” he says of his job. “If you asked me to go do something else, I would say ‘No way, I want to do this.’ Transistor stuff is fun.”
Although his dad was a professor of electrical engineering, “even when I started college, the last thing I wanted to do was be an engineer.” He started as pre-med, but engineering “captured my brain. I took a transistor class and it really changed things. You have a switch that’s solid state, no mechanical parts to it, it’s purely electrical. For some reason I thought that was the coolest thing.”
So he doesn’t get to wear a stethoscope, but there’s plenty of day-to-day diagnosis. “It’s fun to get down into the weeds,” Auth notes. “The exciting part is going in and digging into a particular problem, coming up with some ideas, and then taking those ideas and putting them into a process.”
The best part? After the faster speed, the lower power, and the better yield and reliability are achieved, that silicon becomes “an actual product and then I can go down to Best Buy and I can go buy it” — the physical manifestation of all those ideas and all that work.
Thanks in part to Auth and his team, improvements never stop. “Transistor scaling was supposed to end in 2010. I can’t tell you how many papers said it’s going to end in 2010. And now here it’s 2021 and we have a roadmap going to 2030. So that’s 20 years just right there.”
“You can always see four or five years ahead,” Auth adds, “and you go there as fast as you can. And in four to five years, you’ll be able to see another four or five years ahead.”
You can bet that Auth, who’s been racing longer-distance triathlons for 15 years, will keep on swimming, cycling, running and inventing fast into that future.