Device Configuration User Guide Agilex™ 3 FPGAs and SoCs
3.2. AS Configuration
In AS configuration schemes, the SDM block in the Agilex™ 3 device controls the configuration process and interfaces. The serial flash configuration device stores the configuration data. During AS Configuration, the SDM first powers on with the boot ROM. Then, the SDM loads the initial configuration firmware from AS x4 flash. After the configuration firmware loads, this firmware controls the remainder of the configuration process, including I/O configuration and FPGA core configuration.
Designs including an HPS, can use the HPS to access serial flash memory after the initial configuration. In the Agilex™ 3 device, the QSPI controller is shared between the SDM and the HPS and only one of these can access the QSPI device at a time. At power-up, access of the QSPI controller is granted to the SDM. If the HPS needs access to the QSPI flash device, it must send a request to the SDM for the ownership of this through the HPS-To-SDM mailbox. Software running on the HPS such as the FSBL must request permission from the SDM to access the flash attached to the SDM. Once the HPS gains ownership of the QSPI controller, it retains ownership until the next power cycle, HPS reset, or an HPS reboot generated from an RSU event. For more information about the ownership process, refer to the HPS Use of SDM QSPI Controller appendix in the Hard Processor System Technical Reference Manual: Agilex™ 3 SoCs.
The AS configuration scheme supports AS x4 (4-bit data width) mode only.
Mode | Data Width (bits) | Max Clock Rate | Max Data Rate | MSEL[2:0] | |
---|---|---|---|---|---|
Active | Active Serial (AS) | 4 |
166 MHz | 664 Mbps | Fast mode - 001 Normal mode - 011 |
Configuration Function | Pin Type | Direction | Powered by |
---|---|---|---|
nSTATUS | SDM I/O | Output | VCCIO_SDM |
nCONFIG | SDM I/O | Input | VCCIO_SDM |
MSEL[2:0] | SDM I/O | Input | VCCIO_SDM |
AS_nCSO[3:0] | SDM I/O | Output | VCCIO_SDM |
AS_DATA[3:0] | SDM I/O | Bidirectional | VCCIO_SDM |
AS_CLK | SDM I/O | Output | VCCIO_SDM |
AS_nRST 13 | SDM I/O | Output | VCCIO_SDM |
MSEL Pin Function for the AS x4 Configuration Scheme
The SDM samples the MSEL pins immediately after power-on in the SDM Start state. After the SDM samples the MSEL pins, the MSEL pins become active-low chips selects. For AS x4 designs using one flash device, AS_nCSOO asserts low when the SDM starts to communicate with the QSPI flash. The remaining chip select pins, AS_nCSO1 - AS_nCSO3 deassert high.
Section Content
AS Configuration Scheme Hardware Components and File Types
AS Single-Device Configuration
AS Using Multiple Serial Flash Devices
AS Configuration Timing Parameters
Skew Tolerance Guidelines
Programming Serial Flash Devices
Serial Flash Memory Layout
AS_CLK
Active Serial Configuration Software Settings
Quartus Prime Programming Steps
Debugging Guidelines for the AS Configuration Scheme