Hard Processor System Booting User Guide: Agilex™ 5 SoCs

ID 813762
Date 8/23/2024
Public
Document Table of Contents

1. Introduction

Updated for:
Intel® Quartus® Prime Design Suite 24.1
This user guide describes the Agilex™ 5 SoC FPGA boot flow, boot sources, and how to generate a bitstream required for successful booting of the device. The details provided in this boot user guide include:
  • The typical boot flows and boot stages of the Agilex™ 5 SoC FPGA.
  • The supported system layout for different hard processor system (HPS) boot modes.
  • How to use Quartus® Prime Pro Edition to generate the configuration bitstream.