Ethernet Subsystem Intel® FPGA IP User Guide

ID 773413
Date 10/02/2023
Public

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1. Introduction

Updated for:
Intel® Quartus® Prime Design Suite 23.3
IP Version 23.0.0
For F-Tile variants, the Ethernet Subsystem Intel FPGA IP is provided for evaluation purposes. Features may differ substantially or be dropped in final production. Early access versions should not be used in production. All product plans are subject to change without notice. Statements in this document that refer to future plans or expectations are forward-looking statements. These statements are based on current expectations and involve many risks and uncertainties that can cause actual results to differ materially from those expressed or implied in such statements.

For more information about the factors that could cause actual results to differ materially, see our most recent earnings release and SEC filings at www.intc.com.​​​​

E-Tile variants are considered as production-quality.

The Ethernet Subsystem Intel FPGA IP is a subsystem IP that includes a configurable, Media Access Control (MAC) and Physical Coding Sublayer (PCS) presenting a consistent interface to user logic. It consists of 20 ports. Depending on the tile chosen, each port is implemented based on either the Intel® Agilex® 7 E-Tile Hard IP for Ethernet Intel FPGA IP Core or the F-Tile Hard IP for Ethernet Intel FPGA IP core.

This IP provides a seamless and fast way to instantiate a multi-port design, given that it integrates the required discrete Hard IP and Soft IP ingredients. Furthermore, the Subsystem IP provides a user interface to facilitate enabling required features and parameters of operation.

For E-Tile, this subsystem IP provides Ethernet data rate profiles of 10Gbps, 25Gbps,and 100Gbps with optional RS-FEC and 1588 Precision Time Protocol (PTP). The subsystem also provides profiles for PCS, OTN, FlexE and CPRI.

For F-Tile, this subsystem IP provides Ethernet data rate profiles of 10Gbps, 25Gbps, 40Gbps, 50Gbps, 100Gbps, 200Gbps, and 400Gbps with optional RS-FEC and 1588 Precision Time Protocol (PTP). Intel® Quartus® Prime software version 23.2 supports only Media Access Control (MAC) and Physical Coding Sublayer (PCS) sub-profile.