Ashling* RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide

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ID 730783
Date 7/20/2023
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Document Table of Contents
Document Table of Contents x
1. About the RiscFree* IDE 2. Installation and Setup 3. Getting Started with RiscFree* IDE 4. Debug Setup for Nios® V Processor System 5. Debug Setup for Arm* Hard Processor System 6. Debugging with RiscFree* IDE 7. Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide Archives 8. Document Revision History for the Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide A. Appendix
1. About the RiscFree* IDE x
1.1. Supported Devices 1.2. Intel® Quartus® Prime Software Support
2. Installation and Setup x
2.1. Bundled Installation with the Intel® Quartus® Prime Software 2.2. Standalone Installation
2.2. Standalone Installation x
2.2.1. Standalone Installation with Supported Intel® Quartus® Prime Software 2.2.2. Standalone Installation with the Intel® Quartus® Prime Programmer and Tools
3. Getting Started with RiscFree* IDE x
3.1. Graphical User Interface 3.2. Command Line Interface
4. Debug Setup for Nios® V Processor System x
4.1. Importing Nios® V Processor Project 4.2. Building Nios® V Processor Project 4.3. Setting Debug Configurations and Downloading Nios® V Processor Project Using RiscFree* IDE
5. Debug Setup for Arm* Hard Processor System x
5.1. Pre-requisite for Debugging Arm* HPS Project 5.2. Importing Arm* HPS Project 5.3. Setting Debug Configurations and Downloading Arm* HPS Project Using RiscFree* IDE
6. Debugging with RiscFree* IDE x
6.1. Debug Features in RiscFree* IDE 6.2. Processor System Debug 6.3. Heterogeneous Multicore Debug 6.4. Debugging µC/OS-II Application 6.5. Debugging FreeRTOS Application 6.6. Debugging Zephyr Application 6.7. Arm* HPS On-Chip Trace
6.1. Debug Features in RiscFree* IDE x
6.1.1. Viewing Global Variables 6.1.2. Launching Memory Browser 6.1.3. Debugger Console 6.1.4. Specifying the SVD File 6.1.5. Breakpoint Settings 6.1.6. JTAG UART Output Terminal
6.2. Processor System Debug x
6.2.1. GUI for Debugging
6.3. Heterogeneous Multicore Debug x
6.3.1. Importing Nios® V Processor and Arm* HPS Projects 6.3.2. Setting Core Configuration
6.7. Arm* HPS On-Chip Trace x
6.7.1. Trace Bar 6.7.2. Trace View
A. Appendix x
A.1. Optional Toolchain Configuration A.2. Performing External Tools Configuration A.3. Help Content A.4. Open-Source Components in RiscFree* IDE
A.1. Optional Toolchain Configuration x
A.1.1. Toolchain for Application and BSP A.1.2. Toolchain for Arm* Processor A.1.3. Modifying Toolchain Configuration
1. About the RiscFree* IDE
2. Installation and Setup
3. Getting Started with RiscFree* IDE
4. Debug Setup for Nios® V Processor System
5. Debug Setup for Arm* Hard Processor System
6. Debugging with RiscFree* IDE
7. Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide Archives
8. Document Revision History for the Ashling RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide
A. Appendix

6.6. Debugging Zephyr Application

When you debug the Nios® V processor application, you can view the Zephyr Mutex (Mutual Exclusion Object) List, Zephyr Semaphore List, and Zephyr Thread List.

To display details of Zephyr Mutex, Semaphore and Thread lists, enable the macros as below in the prj.conf file.

Table 10.  Zephyr Debug Configuration
Debug Information Macros Configuration Description
Enable Trace CONFIG_TRACING y
To enable all the tracing function.
Note: All tracing macros have dependency to CONFIG_TRACING.
Mutex List CONFIG_TRACING_OBJECT_TRACKING

y

 To enable object tracking for mutex.
Semaphore List To enable object tracking for semaphore.
Thread List CONFIG_DEBUG_THREAD_INFO y To display thread details.
The configuration is as shown below: 
CONFIG_TRACING=y
CONFIG_TRACING_OBJECT_TRACKING=y
CONFIG_DEBUG_THREAD_INFO=y

To debug Zephyr application, follow these steps:

Launch the Zephyr application debug.
  • To open the Zephyr Mutex List view, go to Window > Show View > Other > Zephyr Mutex List.
    Figure 30. Zephyr OS Mutex List View

    The Zephyr Mutex List tab shows details of all mutexes including handle, thread owner, lock count, priority, along with any wait threads related to each mutex.

  • To open the Zephyr Semaphore List view, go to Window > Show View > Other > Zephyr Sempahore List.
    Figure 31. Zephyr Sempahore List View

    The Zephyr Semaphore List tab shows details of all semaphores including handle, count, limit along with any wait threads related to each semaphore.

  • To open the Zephyr Thread List view, go to Window > Show View > Other > Zephyr Thread List.
    Figure 32. Zephyr OS Thread List View

    The Zephyr Thread List tab shows thread details including name, handle, priority, start of stack, stack size, and status details.

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