1.6. F-Tile CPRI PHY Multirate Intel FPGA IP v2.1.0
| Quartus® Prime Pro Edition Version | Description | Impact |
|---|---|---|
| 22.1 | Removed support for ModelSim* SE simulator. | — |
| Added new parameter: Enable CDR Clock Output. | — |
| Quartus® Prime Pro Edition Version | Description | Impact |
|---|---|---|
| 22.1 | Removed support for ModelSim* SE simulator. | — |
| Added new parameter: Enable CDR Clock Output. | — |