F-Tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 8/04/2025
Public
Document Table of Contents

3.13.1. Using Debug Endpoint Interface within the F-Tile PMA/FEC Direct PHY IP

The Debug Endpoint Avalon® interface is a JTAG Avalon memory-mapped interface that provides access to the reconfiguration register space of the F-tile through System Console. The Quartus® Prime software inserts the debug interconnect fabric to connect the PMA with JTAG.
To enable the Debug Endpoint Avalon® Interface, follow these steps:
  1. Enable the Enable datapath Avalon interface and Enable PMA Avalon interface options in the Avalon Memory-Mapped Interface tab of the F-Tile PMA/FEC Direct PHY IP parameter editor.
  2. Enable the Enable Debug Endpoint on datapath Avalon interface option and Enable Debug Endpoint on PMA Avalon interface option in the Avalon Memory-Mapped Interface tab of the F-Tile PMA/FEC Direct PHY IP parameter editor.
    Note: If you do not select the Enable Debug Endpoint on datapath Avalon interface, you cannot use System Console to access the Direct PHY soft CSR registers.
    Note: If you do not select the Enable Debug Endpoint on PMA Avalon interface, you cannot use System Console to access the FHT and FGT PMA registers.
    Figure 95. IP Parameter Editor
  3. Connect the clock and reset signals to the reconfig_pdp_clk and reconfig_pdp_reset ports of the datapath reconfiguration interface.
  4. Connect the other datapath reconfiguration interface signals:
    • reconfig_pdp_write
    • reconfig_pdp_read
    • reconfig_pdp_address
    • reconfig_pdp_writedata
    • reconfig_pdp_readdata
    • reconfig_pdp_byteenable
    • reconfig_pdp_readdatavalid
    • reconfig_pdp_waitrequest
    to ground, assuming no FPGA core logic controls the reconfiguration interface.
  5. Follow the same connection guidelines in steps 3 and 4 for the reconfig_xcvr* PMA interface signals.
    Note: If you do not connect the reconfiguration interface signals appropriately, the debug endpoint functions unexpectedly.