F-tile Architecture and PMA and FEC Direct PHY IP User Guide

ID 683872
Date 6/24/2022
Public

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3.14.2.2.2. FGT Attribute Access Method Example 2

The following example demonstrates the steps to enable the FGT PMA PRBS checker and generator for logical lane 0, when you configure the FGT PMA in internal serial loopback mode in physical lane 0 of a quad, using the FGT attribute access method.
  1. Assert rx_reset.
  2. Enable serial loopback:
    1. Write 0x6A040 to address 0x9003C.
    2. Poll address 0x90040 until bit 14 = 0 and bit 15 = 1.
    3. Write 0x62040 to address 0x9003C.
    4. Poll address 0x90040 until bit 14 = 0 and bit 15 = 0.
  3. Deassert rx_reset.
  4. Confirm the channel is in serial loopback:
    1. Read out register 0x4781C; bit 1 should be high if serial loopback is enabled.
  5. Check the FGT PMA’s status:
    1. Write 0x800D to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1; bit 16 should also be high if the channel is located in physical local 0.
    3. Write 0x000D to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  6. Set the PRBS31 pattern for both the TX and RX PMAs:
    1. Write 0x30CA041 to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1.
    3. Write 0x30C2041 to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  7. Set up the PMA to count the number of bit errors:
    1. Write 0x14A045 to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1.
    3. Write 0x142045 to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  8. Start the test:
    1. Write 0x20A00F to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1.
    3. Write 0x20200F to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  9. Check that the test is running:
    1. Write 0x8049 to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1; bits 25:24 should be 0x1 to indicate the test is running.
    3. Write 0x0049 to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  10. Set up the PRBS generator to inject errors:
    1. Write 0x123A042 to address 0x9003C to inject 0x123 errors.
    2. Poll address 0x90040 until bit 15 = 1.
    3. Write 0x1232042 to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  11. Tell the PRBS generator to inject errors:
    1. Write 0x23A00F to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1.
    3. Write 0x23200F to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  12. Stop the BER test:
    1. Write 0x21A00F to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1.
    3. Write 0x21200F to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  13. Check the test completed successfully:
    1. Write 0x8049 to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1; bits 25:24 should be 0x3.
    3. Write 0x0049 to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  14. Read out the 12 LSB of the error count:
    1. Write 0x804A to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1; bits 27:16 represent the 12 LSBs of the error count.
    3. Write 0x004A to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  15. Read out bits 27:12 of the error count:
    1. Write 0x804B to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1; bits 31:16 represent bits 27:12 of the error count.
    3. Write 0x004B to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  16. Read out bits 31:28 of the error count:
    1. Write 0x804C to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1; bits 19:16 represent bits 31:28 of the error count.
    3. Write 0x004C to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.
  17. Finish checking the PRBS and BER test:
    1. Write 0xA041 to address 0x9003C.
    2. Poll address 0x90040 until bit 15 = 1.
    3. Write 0x2041 to address 0x9003C.
    4. Poll address 0x90040 until bit 15 = 0.