Design Flow
System Specification
Device Selection
Early System and Board Planning
Pin Connection Considerations for Board Design
I/O and Clock Planning
Design Entry
Design Implementation, Analysis, Optimization, and Verification
Document Revision History for Intel® Cyclone® 10 LP Device Design Guidelines
Power Optimization
Intel® Cyclone® 10 LP devices use architectural power reduction techniques to minimize power and deliver high performance. To reduce dynamic power consumption in Intel® Cyclone® 10 LP devices, you can use various design and software techniques to optimize your design.
Power optimization in the Intel® Quartus® Prime Standard Edition software depends on accurate power analysis results. Use the guidelines in the previous section to ensure the software optimizes the power utilization correctly for the design’s operating behavior and conditions.