Multi Channel DMA Intel® FPGA IP for PCI Express Release Notes

ID 683791
Date 12/27/2022

1.3. Multi Channel DMA Intel FPGA IP for PCI Express : IP Core [H-Tile: 21.5.0 ] [P-Tile: 3.1.0 ] [F-Tile: 3.0.0 ]

Table 3.  Multi Channel DMA Intel FPGA IP for PCI Express : IP Core [H-Tile: 21.5.0] [P-Tile: 3.1.0] [F-Tile: 3.0.0] : 2022.07.01
Intel® Quartus® Prime Version IP Version Description Impact

[H-Tile: 21.5.0 ]

[P-Tile: 3.1.0 ]

[F-Tile: 3.0.0]

Enabled example designs for BAM+MCDMA mode AVST interface type

You can select 'Device-side Packet Loopback' and 'Packet Generate/Check' example designs when you choose BAM+MCDMA mode AVST type.

Enabled F-Tile Debug Toolkit support for MCDMA F-Tile IP Core.

You can enable Debug Toolkit for MCDMA F-Tile IP Core

Changed BAS AVMM Slave waitrequestAllowance to 0

BAS AVMM Slave interface accept no Read/Write transactions after waitrequest is asserted.

Removed 32-bit prefetchable memory from BAR type options

32-bit prefetchable memory type is not supported

Deprecated 4 port AVST interface support for MCDMA modes

MCDMA AVST interface supports 1 port mode only.

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