1. Stratix® 10 Configuration User Guide
2. Stratix® 10 Configuration Details
3. Stratix® 10 Configuration Schemes
4. Including the Reset Release IP in Your Design
5. Remote System Update (RSU)
6. Stratix® 10 Configuration Features
7. Stratix® 10 Debugging Guide
8. Stratix® 10 Configuration User Guide Archives
9. Document Revision History for the Stratix® 10 Configuration User Guide
2.1. Stratix® 10 Configuration Timing Diagram
2.2. Configuration Flow Diagram
2.3. Device Response to Configuration and Reset Events
2.4. Additional Clock Requirements for HPS, PCIe* , eSRAM, and HBM2
2.5. Stratix® 10 Configuration Pins
2.6. Configuration Clocks
2.7. Maximum Configuration Time Estimation
2.8. Generating Compressed .sof File
2.9. Dual-die Configuration on Stratix® 10 GX 10M
3.1.1. Avalon® -ST Configuration Scheme Hardware Components and File Types
3.1.2. Enabling Avalon-ST Device Configuration
3.1.3. The AVST_READY Signal
3.1.4. RBF Configuration File Format
3.1.5. Avalon-ST Single-Device Configuration
3.1.6. Debugging Guidelines for the Avalon® -ST Configuration Scheme
3.1.7. IP for Use with the Avalon® -ST Configuration Scheme: Parallel Flash Loader II IP (PFL II)
3.1.7.1. Functional Description
3.1.7.2. Designing with the Parallel Flash Loader II IP for Avalon-ST Single Device Configuration
3.1.7.3. Generating the Parallel Flash Loader II IP
3.1.7.4. Constraining the Parallel Flash Loader II IP
3.1.7.5. Using the Parallel Flash Loader II IP
3.1.7.6. Supported Flash Memory Devices
3.1.7.3.1. Controlling Avalon-ST Configuration with Parallel Flash Loader II IP
3.1.7.3.2. Mapping Parallel Flash Loader II IP and Flash Address
3.1.7.3.3. Creating a Single Parallel Flash Loader II IP for Programming and Configuration
3.1.7.3.4. Creating Separate Parallel Flash Loader II IP Functions
3.1.7.4.1. Parallel Flash Loader II IP Recommended Design Constraints to FPGA Avalon-ST Pins
3.1.7.4.2. Parallel Flash Loader II IP Recommended Design Constraints for Using QSPI Flash
3.1.7.4.3. Parallel Flash Loader II IP Recommended Design Constraints for Using CFI Flash
3.1.7.4.4. Parallel Flash Loader II IP Recommended Constraints for Other Input Pins
3.1.7.4.5. Parallel Flash Loader II IP Recommended Constraints for Other Output Pins
3.2.1. AS Configuration Scheme Hardware Components and File Types
3.2.2. AS Single-Device Configuration
3.2.3. AS Using Multiple Serial Flash Devices
3.2.4. AS Configuration Timing Parameters
3.2.5. Skew Tolerance Guidelines
3.2.6. Programming Serial Flash Devices
3.2.7. Serial Flash Memory Layout
3.2.8. AS_CLK
3.2.9. Active Serial Configuration Software Settings
3.2.10. Quartus® Prime Programming Steps
3.2.11. Debugging Guidelines for the AS Configuration Scheme
5.1. Remote System Update Functional Description
5.2. Guidelines for Performing Remote System Update Functions for Non-HPS
5.3. Commands and Responses
5.4. Quad SPI Flash Layout
5.5. Generating Remote System Update Image Files Using the Programming File Generator
5.6. Remote System Update from FPGA Core Example
5.7. Debugging Guidelines for RSU Configuration
5.6.1. Prerequisites
5.6.2. Creating Initial Flash Image Containing Bitstreams for Factory Image and One Application Image
5.6.3. Programming Flash Memory with the Initial Remote System Update Image
5.6.4. Reconfiguring the Device with an Application or Factory Image
5.6.5. Adding an Application Image
5.6.6. Removing an Application Image
7.1. Configuration Debugging Checklist
7.2. Stratix® 10 Configuration Architecture Overview
7.3. Understanding Configuration Status Using quartus_pgm command
7.4. SDM Debug Toolkit Overview
7.5. Configuration Pin Differences from Previous Device Families
7.6. Configuration File Format Differences
7.7. Understanding SEUs
7.8. Reading the Unique 64-Bit CHIP ID
7.9. E-Tile Transceivers May Fail To Configure
7.10. Understanding and Troubleshooting Configuration Pin Behavior
7.11. Configuration Debugger Tool
5.6.6. Removing an Application Image
- Set up exclusive access to the AS x4 interface and flash memory by running the QSPI_OPEN and QSPI_SET_CS commands in the Tcl Console window. You now have exclusive access to the AS x4 interface and flash until you relinquish access by running the QSPI_CLOSE command. Write the new application image to the flash memory using the QSPI_WRITE command.
- Write 0x00000000 to the application image start address stored in the image pointer entry of the configuration firmware pointer block (CPB0 and CPB1) using the QSPI_WRITE command.
Note: You must update both copies (copy0 and copy1) when editing the configuration firmware pointer block and sub-partition table.
- Erase the application image content in the flash memory using the QSPI_ERASE command.
- To remove a new application image, add another new application image in the next or subsequent image pointer entry or allow the device to fall back to the previous or secondary application image in your application image list. The following table shows correct entries for image pointer entries for CPB0 and CPB1 for offsets 0x20 and 0x28 :
Table 52. Configuration Firmware Pointer Block Contents CPB Start Address + 0x20 Content Value CPB0 + 0x20 = 0x002E4020 Old application image pointer entry (lower priority) 0x002F4000 CPB0 + 0x28 = 0x002E4028 Current/new application image pointer entry (highest priority) 0x03FF0000 CPB1 + 0x20 = 0x002EC020 Old application image pointer entry (lower priority) 0x002F4000 CPB1 + 0x28 = 0x002EC028 Current/New application image pointer entry (highest priority) 0x03FF0000 Figure 93. Read Current CPB Values% qspi_read 0x002e4020 1 0x002f400 % qspi_read 0x002e4028 1 0x03ff0000 % qspi_read 0x002ec020 1 0x002f4000 % qspi_read 0x002ec028 1 ISR is empty 0x03ff0000
You can now remove the current or new application image address image pointer entry by writing the value to 0x00000000 using the QSPI_write_one_word function as shown in the following example. The QSPI_write_one_word function takes address and data arguments. Be sure to erase the application content that you just removed from flash memory.
Figure 94. Remove Application Image% qspi_write_one_word 0x002e4028 0x00000000 % qspi_write_one_word 0x002ec028 0x00000000
You can use a QSPI_read to the image pointer entry at offset 0x28 for CBP0 and CPB1 to verify completion of the QSPI_write_one_word commands .
Figure 95. Verify the Writes% qspi_read 0x002e4028 1 % qspi_read 0x002ec028 1
You can now configure the device with the old application image. The old application image has the highest priority if you power cycle the device or the host asserts the nCONFIG pin. You can run the rsu_status report to check the status of the current image address.