1.3. Altera IP Regeneration
Intel FPGA IP products are now Altera IP products. The names of individual IP products will be updated over time to reflect this new name.
The following Altera IPs have major version updates and must be regenerated in Quartus® Prime Pro Edition Version 25.1.1:
| 1G/2.5G/5G/10G Multirate Ethernet PHY IP |
| Content-Addressable Memory IP |
| DDR4 Component External Memory Interfaces (EMIF) IP |
| DDR4 DIMM External Memory Interfaces (EMIF) IP |
| DDR5 Component External Memory Interfaces (EMIF) IP |
| DDR5 DIMM External Memory Interfaces (EMIF) IP |
| Ethernet IEEE 1588 Time of Day Clock Altera FPGA IP |
| Ethernet Subsystem FPGA IP |
| External Memory Interfaces for HPS IP |
| F-Tile 25G Ethernet Soft-IP |
| F-Tile Auto-Negotiation and Link Training for Ethernet IP |
| F-Tile Ethernet Hard IP |
| F-Tile Ethernet Multirate IP |
| F-Tile Low Latency 100G Ethernet IP |
| F-Tile Low Latency 50G Ethernet IP |
| GTS Auto-Negotiation and Link Training for Ethernet IP |
| GTS CPRI PHY IP |
| GTS Dynamic Reconfiguration Controller IP |
| GTS Ethernet Hard IP |
| GTS Interlaken IP |
| GTS JESD204B IP |
| GTS JESD204C IP |
| GTS PMA/FEC Direct PHY IP |
| GTS Serial Lite IV IP |
| High Bandwidth Memory (HBM2E) Interface Agilex 7 IP |
| L-/H-Tile Avalon Memory-Mapped+ Altera FPGA IP for PCI Express |
| L-/H-Tile Avalon Streaming Altera FPGA IP for PCI Express |
| Low Latency 40G Ethernet IP |
| LPDDR4 External Memory Interfaces (EMIF) IP |
| LPDDR5 External Memory Interfaces (EMIF) IP |
| LVDS Tunneling Protocol and Interface (LTPI) IP |
| Memory Subsystem IP |
| MIPI DPHY IP |
| R-Tile Avalon Streaming FPGA IP for PCI Express |
| Triple-Speed Ethernet IP |