1.9. Altera® FPGA SDM Firmware
Quartus® Prime Pro Edition Version 25.1.1 includes new SDM firmware features as well as fixes.
When regenerating your configuration bitstream, use the latest version of the Quartus® Prime Pro Edition software, which includes the latest firmware. You do not need to recompile your .sof to use the firmware from a newer version of the Quartus® Prime Pro Edition software. You can regenerate your configuration bitstream with the new version of the Programming File Generator.
New Altera® FPGA SDM Firmware Features and Enhancements
New Feature or Enhancement | Component Area |
---|---|
N/A | N/A |
New Feature or Enhancement | Component Area |
---|---|
Support for VID Mode as Voltage Output Format. | Power |
Support for GET_I2C_TELEMETRY mailbox command. | Power |
New Feature or Enhancement | Component Area |
---|---|
Support for VID Mode as Voltage Output Format. | Power |
New Feature or Enhancement | Component Area |
---|---|
N/A | N/A |
Fixed Altera® FPGA SDM Firmware Issues
Issue Fixed | Description | Component Area | Intel Premier Support Case Number | Knowledge Base Article |
---|---|---|---|---|
Issue with single event upset (SEU) injection and reporting in the Fault Injection Debugger and Advanced SEU Detection IP. | Due to an issue, the Fault Injection Debugger tool may report incorrect bit locations. The fix includes a required update to the frame and bit range used for error location reporting. | Programmer | N/A | N/A |
Issue Fixed | Description | Component Area | Intel Premier Support Case Number | Knowledge Base Article |
---|---|---|---|---|
Issue with single event upset (SEU) injection and reporting in the Fault Injection Debugger and Advanced SEU Detection IP. | Due to an issue, the Fault Injection Debugger tool may report incorrect bit locations. The fix includes a required update to the frame and bit range used for error location reporting. | Programmer | N/A | N/A |
Incorrect HVIO signal behavior during configuration. | During configuration and reconfiguration, HVIO signal may be driven incorrectly high for a short duration. | Configuration | N/A | N/A |
Issue Fixed | Description | Component Area | Intel Premier Support Case Number | Knowledge Base Article |
---|---|---|---|---|
General improvements and fixes for F-Tile devices. | For devices with F-tile, .sof files and Quartus® Prime Pro Edition Programmer must both be upgraded to 25.1.1 when creating bitstreams for devices. | Configuration | N/A | N/A |
Reported UIB REFCLK timeout causes configuration to fail. | For HPS First 2nd stage reconfigurations, a UIB REFCLK timeout may be observed, halting configuration due to a firmware issue. | Configuration | N/A | N/A |
Device may become stuck in configuration mode after successive reconfigurations. | For the Avalon-ST (AVST) configuration scheme, in rare cases, successive reconfigurations may cause the device to hang. The fix includes an update to the firmware polling scheme to address this issue. | Configuration | N/A | N/A |
Intermittent configuration failure after many power cycles. | In the Active Serial (AS) configuration scheme, repeated power cycles may cause the device to report an internal error and fail to configure. | Configuration | 00912060 | N/A |
Issue Fixed | Description | Component Area | Intel Premier Support Case Number | Knowledge Base Article |
---|---|---|---|---|
N/A | N/A | N/A | N/A | N/A |
For the latest device firmware patches, refer to FPGA Knowledge Base Article, What is the latest device firmware for Agilex™ FPGA and Stratix® 10 FPGA? .