Quartus® Prime Pro Edition: Version 25.1.1 Software and Device Support Release Notes

Download PDF
ID 683706
Date 8/11/2025
Public
Document Table of Contents
Document Table of Contents x
1. Quartus® Prime Pro Edition Version 25.1.1 Software and Device Support Release Notes
1. Quartus® Prime Pro Edition Version 25.1.1 Software and Device Support Release Notes x
1.1. New Features and Enhancements 1.2. Changes to Software Behavior 1.3. Altera IP Regeneration 1.4. Operating System Support 1.5. Disk Space and Memory Recommendations 1.6. Quartus® Prime Licensing Information 1.7. Device Support and Pin-Out Status 1.8. Timing Model, Power Model, and Device Model Status 1.9. Altera® FPGA SDM Firmware 1.10. IBIS Models 1.11. EDA Interface Information 1.12. Antivirus Verification 1.13. Software Issues Resolved 1.14. Software Patches Included in this Release 1.15. Latest Known Quartus® Prime Software Issues 1.16. Latest Known Altera® FPGA SDM Firmware Issues 1.17. Quartus® Prime Pro Edition Software and Device Support Release Notes Archives 1.18. Quartus® Prime Pro Edition Software Release Version 25.1.1 Document Revision History
1.2. Changes to Software Behavior x
1.2.1. Deprecated Features and Functions 1.2.2. Removed Features and Functions
1.7. Device Support and Pin-Out Status x
1.7.1. Devices with Final Device Support 1.7.2. Devices with Preliminary Device Support 1.7.3. Devices with Advance Device Support 1.7.4. Changes in Device Support
1. Quartus® Prime Pro Edition Version 25.1.1 Software and Device Support Release Notes

1.2. Changes to Software Behavior

This section documents instances in which the behavior and default settings of the Quartus® Prime Pro Edition software have been changed from earlier releases of the Quartus® Prime Pro Edition software.
Quartus® Prime Pro Edition software version 25.1.1 introduces the following changes:

  • The fast simulation models, initially introduced in Quartus® Prime Pro Edition software version 24.3.1, are now the default simulation models for IP example designs targeting Agilex™ FPGA portfolio devices, except for the following IP:

    • Intel® R-Tile for Compute Express Link Solution
    • AXI Multichannel DMA IP for PCI Express
    • DisplayPort IP

    The fast simulation models are currently supported only for Agilex™ FPGA portfolio IP on Siemens EDA QuestaSim* and Synopsys VCS* . For more information, refer to How do I use the fast simulation models to improve the simulation time in the Quartus® Prime Pro Edition software version 24.3.1 onwards?

  • If there are critical warnings about pins missing Location or I/O Standard assignments, the Quartus® Prime Pro Edition software no longer generates programming files.

    For details about pins that are missing these assignments, refer to the I/O Assignment Warnings report in the Fitter Plan stage.

    For pins that are missing Location or I/O Standard assignments, add the appropriate assignments, and recompile the design.

For a list of all the default assignment settings for the latest version of the Quartus® Prime software, refer to the Quartus® Prime Default Settings File (.qdf):
  • Linux* operating systems: <Quartus Prime installation directory>/quartus/linux64/assignment_defaults.qdf
  • Windows* operating systems: <Quartus Prime installation directory>/quartus/windows64/assignment_defaults.qdf

Section Content
Deprecated Features and Functions
Removed Features and Functions

Level Two Title