AN 496: Using the Internal Oscillator Intel® FPGA IP

ID 683653
Date 4/01/2024
Public

Document Revision History for AN 496: Using the Internal Oscillator Intel® FPGA IP

Document Version Changes
2024.04.01 Added support for Agilex™ 5 devices.
Date Version Changes
April 2023 2023.04.03
  • Updated the Frequency Range for Supported Intel Devices table and Using the Internal Oscillator in All Supported Devices (Except MAX II and MAX V Devices) chapter to include Intel Agilex® 7 devices.
  • Updated document to the latest Intel branding standards.
  • Changed the document title from AN 496: Using the Internal Oscillator IP Core to AN-496 Using the Internal Oscillator Intel FPGA IP to include other supported devices.
November 2017 2017.11.06
  • Added support for the following devices:
    • Cyclone® III
    • Cyclone® IV
    • Cyclone® V
    • Cyclone® 10 GX
    • Cyclone® 10 LP
    • Arria® II GX
    • Arria® V
    • Arria® 10
    • Stratix® V
    • Stratix® 10
  • Changed the document title from Using the Internal Oscillator in Altera MAX Series to Using the Internal Oscillator IP Core to include other supported devices.
  • Rebranded as Intel.
November 2014 2014.11.04 Updated the frequency for undivided internal oscillator and output clock from internal oscillator frequency values for MAX 10 devices in the Frequency Range for Supported Altera Devices table.
September 2014 2014.09.22 Added MAX 10 devices.
January 2011 2.0 Updated to include MAX V devices.
December 2007 1.0 Initial release.