Native Fixed Point DSP Agilex™ FPGA IP Release Notes

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ID 683569
Date 4/21/2025
Public
Document Table of Contents
Document Table of Contents x
1. Native Fixed Point DSP Agilex™ FPGA IP Release Notes
1. Native Fixed Point DSP Agilex™ FPGA IP Release Notes x
1.1. Native Fixed Point DSP Agilex™ FPGA IP (agilex_native_fixed_point_dsp) v3.0.0 1.2. Native Fixed Point DSP Intel Agilex FPGA IP (agilex_native_fixed_point_dsp) v2.0.0 1.3. Native Fixed Point DSP Intel Agilex FPGA IP (agilex_native_fixed_point_dsp) v1.0.0 1.4. Native Fixed Point DSP Agilex™ FPGA IP (s20_native_fixed_point_dsp) v20.0.0 1.5. Native Fixed Point DSP Intel Agilex FPGA IP (s20_native_fixed_point_dsp) v19.1.1
1. Native Fixed Point DSP Agilex™ FPGA IP Release Notes

1.1. Native Fixed Point DSP Agilex™ FPGA IP (agilex_native_fixed_point_dsp) v3.0.0

Table 1.  v3.0.0 2025.04.07
Quartus® Prime Version Description Impact
25.1 Added support for Agilex™ 3 FPGAs and SoCs. —
Renamed Native Fixed Point DSP Agilex™ 5 FPGA IP to Native Fixed Point DSP Agilex™ FPGA IP as per Altera rebranding. —
Table 2.  v3.0.0 2025.01.27
Quartus® Prime Version Description Impact
24.3.1 Removed the disable_chainout feature that is not supported in Agilex™ 5. Contact Altera for more details. This is a required upgrade. Failure to upgrade your IP will result in an error.
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