Intel® FPGA SDK for OpenCL™ Pro Edition: Best Practices Guide

ID 683521
Date 12/13/2021
Public

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Document Table of Contents

2.4.1.2. Reviewing Global Memory Information

The global memory view of the System Viewer provides a list of all global memories in the design. The global memory view shows the following:
  • Connectivity within the system showing data flow direction between global memory and kernels
  • Memory throughput bottlenecks
  • Status of the offline compiler flags, such as -num-reorder and -force-single-store-ring
  • Global load-store unit (LSU) types
  • Type of write/read interconnects
  • Number of write rings
  • Number and connectivity of read-router buses

The following image is an example of the global memory view of the System Viewer:

Figure 13. Graphical Representation of the Global Memory in the System Viewer

In Figure 13:

  • When you select stores or loads, you can view respective lines in the source code and details about the LSU type and LSU-level bandwidth.
  • For the write interconnect block, you can view the interconnect style, number of writes to the global memory, status of the -force-single-store-ring compiler flag, and number of store rings.
  • For the read interconnect block, you can view the interconnect style and number of reads from the global memory.
  • For the read interconnect router block, you can view the status of the -num-reorder flag, total number of buses, and all connections between buses and load LSUs. Buses in this block provide read data from the memory to load LSUs.
  • For the global memory (DDR in Figure 13), you can view the status of interleaving, interleaving size, number of channels, maximum bandwidth the BSP can deliver, and channel width.
  • For the memory controller block, you can view the maximum bandwidth the BSP can deliver, sum of the load/store throughput, and read/write bandwidth. For additional information about how global memory bandwidth use is calculated, refer to Global Memory Bandwidth Use in this guide. It describes the formulas used in calculating the bandwidth.
  • LSUs using USM pointers show up twice in both host and device global memory views as they can access both memories.