Security User Guide: Intel® FPGA Programmable Acceleration Card N3000 Variants

ID 683519
Date 9/08/2020
Public
Document Table of Contents

1.1. About This Document

Reference this user guide to understand and enable the security features such as Root of Trust (RoT) and FPGA static region (SR) user image signing for all Intel® FPGA Programmable Acceleration Card N3000 variations:
  • Intel® FPGA PAC N3000-1
  • Intel® FPGA PAC N3000-2
  • Intel® FPGA PAC N3000-N
Note: The Intel® Arria® 10 in the Intel® FPGA PAC N3000 contains a static image. No partial reconfiguration is supported. Thus, any references to FPGA SR image, flat image, or AFU image in context of an Intel® FPGA PAC N3000 design is part of the static FPGA design.
Note: References to Intel® FPGA PAC N3000 in this document apply to all three variants unless otherwise specified.