Intel® High Level Synthesis Compiler Pro Edition: User Guide

ID 683456
Date 3/28/2022
Public

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8. Integrating your IP into a System

To integrate your HLS compiler-generated IP into a system with Intel® Quartus® Prime, you must be familiar with Intel® Quartus® Prime Pro Edition as well as the Platform Designer (formerly Qsys Pro) system integration tool included with Intel® Quartus® Prime.

The <result>.prj/components directory contains all the files you need to include your IP in an Intel® Quartus® Prime Pro Edition project. The IP that the HLS compiler generates for each component is self contained. You can move the folders in the components directory to a different location or machine if desired.

For overloaded and templated functions in your hardware design, the Intel® HLS Compiler sometimes generates short names to prevent name collisions. Use these short names when integrating the generated RTL into your design.

Review the Summary Report in the High-Level Design Reports (report.html) to see any short names generated by the compiler.

For an example of the full Intel® HLS Compiler design flow including integrating your IP into a system, watch the HLS Walkthrough series at the Intel FPGA channel on YouTube or complete the full-design tutorial found in <quartus_installdir>/hls/examples/tutorials/usability.

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