5G LDPC-v Intel® FPGA IP Release Notes
These release notes describe the changes for each IP version.
If a release note is not available for a specific IP version, the IP has no changes in that version. For information on IP update releases up to v18.1, refer to the Intel® Quartus® Prime Design Suite Update Release Notes.
Intel® FPGA IP versions match the Intel® Quartus® Prime Design Suite software versions until v19.1. Starting in Intel® Quartus® Prime Design Suite software version 19.2, Intel® FPGA IP has a new versioning scheme.
The Intel® FPGA IP version (X.Y.Z) number can change with each Intel® Quartus® Prime software version. A change in:
- X indicates a major revision of the IP. If you update the Intel® Quartus® Prime software, you must regenerate the IP.
- Y indicates the IP includes new features. Regenerate your IP to include these new features.
- Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
IP Version | Intel® Quartus® Prime Software Version | Changes |
---|---|---|
2.0.1 | 20.3 | Updated RTL to prevent a new synthesis warning generating in Intel® Quartus® Prime v20.3 |
2.0.0 | 20.1 | - |
1.0.0 | - | Initial release. |