Input clock signal to trigger the input data registers, output data registers, and I/O setting data registers.

8 bit bidirectional data lines that interface with the MCU data bus and transmit configuration data.

• To write or read the 8-bit data to or from the I/O expander, use WR or RD signals with positive edge trigger.
• To set the MCU port as data or address bus, use the MODE signal.

Input signal to select the device.

Input signal to reset the device and all internal registers asynchronously.

• Stores the address[5..0] from the MCU port on the rising edge of CLK into the configuration registers.
• Enables the clock signal to the configuration registers.
• Ignores data on address[7..6].

• Stores the address[1..0] from the MCU port on the rising edge of CLK into the configuration registers.
• Enables the clock signal to the configuration registers.
• Ignores data on address[7..2].

• Causes the data on the MCU port to be written to the enabled port (A, B, C, or D) on the rising edge of CLK.
• Enables the clock signal to the output data registers

• Enables the data bus transfer to the MCU port from the enabled port (A, B, C, or D) on the rising edge of CLK.
• Enables the clock signal to the input data registers.

• When high, tri-states the MCU port.
• When low, sets the MCU port as input or output based on the configuration registers.

8-bit, general-purpose I/O port that can be programmed to either output or input mode.

8-bit, general-purpose I/O port that can be programmed to either output or input mode.

8-bit, general-purpose I/O port that can be programmed to either output or input mode.

8-bit, general-purpose I/O port that can be programmed to either output or input mode.