Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 4/07/2025
Public
Document Table of Contents

ENABLE_RELAXED_CHECKING_MODE

Enabling this flag will downgrade some errors that strictly follow the LRM but aren't critical. Relaxed checking mode is only supported for verilog/system_verilog and not supported for vhdl.

Type

Boolean

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Syntax

set_global_assignment -name ENABLE_RELAXED_CHECKING_MODE <value>

Default Value

Off