1.2. Low Latency E-Tile 40G Ethernet Intel® FPGA IP v21.0.0
| Intel® Quartus® Prime Version | Description | Impact |
|---|---|---|
| 20.3 | Updated the reconfig_address signal width from 21-bit address to a 20-bit address. | Removed deprecated bit [21]. |
| Intel® Quartus® Prime Version | Description | Impact |
|---|---|---|
| 20.3 | Updated the reconfig_address signal width from 21-bit address to a 20-bit address. | Removed deprecated bit [21]. |