Agilex™ 7 Variable Precision DSP Blocks User Guide

ID 683037
Date 8/06/2025
Public
Document Table of Contents

8. LPM_MULT Intel® FPGA IP Core References

The LPM_MULT FPGA IP implements a multiplier to multiply two input data values to produce a product as an output.

This is a family independent IP.

Figure 70.  LPM_MULT Intel® FPGA IP Core Architecture