Intel® Fortran Compiler Classic and Intel® Fortran Compiler Developer Guide and Reference

ID 767251
Date 11/07/2023
Public

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Document Table of Contents

PROCESSOR Clause

Parallel Directive Clause: Tells the compiler to create a vector version of the routine for the specified processor. When running on a processor that does not match "cpuid", a scalar version will be invoked multiple times based on vector length.

Syntax

PROCESSOR (cpuid)

cpuid

Is one of the following:

atom

Intel Atom® processors with Supplemental Streaming SIMD Extensions 3 (SSSE3)

atom_sse4_2

Intel Atom® processors with Intel® Streaming SIMD Extensions 4.2 (Intel® SSE4.2)

atom_sse4_2_movbe

Intel Atom® processors with Intel® Streaming SIMD Extensions 4.2 (Intel® SSE4.2) with MOVBE instructions enabled

broadwell

This is a synonym for core_5th_gen_avx.

core_2_duo_sse4_1

Intel® 45nm Hi-k next generation Intel® Core™ microarchitecture processors with Intel® Streaming SIMD Extensions 4.1 (Intel® SSE4.1)

core_2_duo_ssse3

Intel® Core™2 Duo processors with Intel® Supplemental Streaming SIMD Extensions 3 (SSSE3)

core_2nd_gen_avx

2nd generation Intel® Core™ processor family with support for Intel® Advanced Vector Extensions (Intel® AVX)

core_3rd_gen_avx

3rd generation Intel® Core™ processor family with support for Intel® Advanced Vector Extensions (Intel® AVX) including the RDRND instruction

core_4th_gen_avx

4th generation Intel® Core™ processor family with support for Intel® Advanced Vector Extensions 2 (Intel® AVX2) including the RDRND instruction

core_4th_gen_avx_tsx

4th generation Intel® Core™ processor family with support for Intel® Advanced Vector Extensions 2 (Intel® AVX2) including the RDRND instruction, and support for Intel® Transactional Synchronization Extensions (Intel® TSX)

core_5th_gen_avx

5th generation Intel® Core™ processor family with support for Intel® Advanced Vector Extensions 2 (Intel® AVX2) including the RDSEED and Multi-Precision Add-Carry Instruction Extensions (ADX) instructions

core_5th_gen_avx_tsx

5th generation Intel® Core™ processor family with support for Intel® Advanced Vector Extensions 2 (Intel® AVX2) including the RDSEED and Multi-Precision Add-Carry Instruction Extensions (ADX) instructions, and support for Intel® Transactional Synchronization Extensions (Intel® TSX)

core_aes_pclmulqdq

Intel® Core™ processors with support for Advanced Encryption Standard (AES) instructions and carry-less multiplication instruction

core_i7_sse4_2

Intel® Core™ i7 processors with Intel® Streaming SIMD Extensions 4.2 (Intel® SSE4.2) instructions

generic

Other Intel processors for IA-32 or Intel® 64 architecture or compatible processors not provided by Intel Corporation

haswell

This is a synonym for core_4th_gen_avx.

pentium

Intel® Pentium® processor

pentium_4

Intel® Pentium® 4 processor

pentium_4_sse3

Intel® Pentium® 4 processor with Intel® Streaming SIMD Extensions 3 (Intel® SSE3) instructions, Intel® Core™ Duo processors, Intel® Core™ Solo processors

pentium_ii

Intel® Pentium® II processors

pentium_iii

Intel® Pentium® III processors

pentium_iii_no_xmm_regs

Intel® Pentium® III processors with no XMM registers

pentium_m

Intel® Pentium® M processors

pentium_mmx

Intel® Pentium® processors with MMX™ technology

pentium_pro

Intel® Pentium® Pro processors

skylake

Intel® microarchitecture code name Skylake. This keyword targets the Client CPU without support for Intel® AVX-512 instructions.

skylake_avx512

Intel® microarchitecture code name Skylake. This keyword targets the Server CPU with support for Intel® AVX-512 instructions.

The vector version of the routine that is created by the compiler is not affected by processor options specified on the command line.

Multiple PROCESSOR clauses cause a syntax error.

NOTE:

ifx does not support compilation for 32-bit architectures; only cpuid values for 64-bit instruction sets may be specified for ifx.