Learn the basics of designing custom logic on Intel® FPGA technology with these project-based workshops. Each workshop contains lecture slides plus multiple labs and exercises designed for new users. To be successful, first read or watch the lecture material, and then complete the associated projects.
A laptop or desktop computer with a USB port
An Intel® FPGA development kit from Terasic
Students and professors can receive an academic discount through our partner, Terasic.
Use Platform Designer to build a customized embedded system using a soft processor. Write bare-metal software using the open source Eclipse* IDE. Interact with an I/O peripheral using functions from the Nios II Hardware Abstraction Layer (HAL).
Prerequisites: Computer organization, software development in C
Introduction to Static Timing Analysis of Digital Circuits
Calculate timing margins by completing paper and pencil exercises. Practice writing, analyzing, and correcting constraints using the Timing Analysis tool within the Intel® Quartus® Prime Software Suite.
Prerequisites: Digital logic design, computer architecture
Learn how to simulate and debug digital designs. Practice debugging real systems using tools in the Intel Quartus Prime Software Suite, such as ModelSim*, SignalTap, System Console, and In-System Sources and Probes Editor.
Learn how to use C derivatives, such as OpenCL™ software technology and the Intel® High Level Synthesis Compiler, to describe FPGA designs without hardware description languages. Discover how to increase your productivity by building a computationally rich workload using Intel Quartus software, ModelSim, and the Intel® HLS Compiler.
Prerequisites: Digital logic design, computer architecture, coding in C and C++
Learn how to develop and deploy FPGAs for workload optimization in data center and cloud environments using the acceleration stack for Intel® Xeon® CPU with FPGAs. Practice writing host code that communicates transparently with the FPGA accelerator using the Open Programmable Acceleration Engine (OPAE).