This document provides a summary of new and changed features of the Intel® C++ Compiler for applications running on Windows* targets. It also includes notes about features and problems not described in the product documentation.
Intel® C++ Compiler 18.0 in Intel® System Studio 2018 is based on the Intel® C++ Compiler 18.0 in Intel® Parallel Studio XE 2018 for C++ Windows* with some limitations.
Change History
Changes in Update 2 (Intel® C++ Compiler 18.0.4)
- Changes to mitigate speculative executive side channel issue and new -mconditional-branch option. Please see detailed article at Using Intel® Compilers to Mitigate Speculative Execution Side-Channel Issues.
- __INTEL_LIBIRC_DEBUG environment variable
- Restored context sensitive help in VS
- /Q[a]xIcelake-server and /Q[a]xIcelake-client options added to support Ice Lake microarchitecture
- /Q[a]xCannonlake option added to support Cannon Lake microarchitecture
- Corrections to reported problems
Changes in Update 1 (Intel® C++ Compiler 18.0.2)
- Exposed a new property in Visual Studio "C/C++ Language Support" with full set of /Qstd option values for all supported in IDE plug-ins Intel compiler versions (18.0, 17.0, 16.0)
- Deprecated “Enable C++11 support (/Qstd=c++11)” and “Enable C99 support (/Qstd=c++11)” properties in all supported VS versions (VS2017, VS2015, VS2013)
- Changes to mitigate Spectre variant 2 issue and new -mindirect-branch option. Please see detailed article at Using Intel® Compilers to Mitigate Speculative Execution Side-Channel Issues.
- More stable integration with Microsoft* Visual Studio 2017
- Fixes for reported problems
Changes since Intel® C++ Compiler 17.0 (New in Intel® C++ Compiler 18.0)
- CET - Control-Flow Enforcement Technology support
- New option -Qimf-use-svml to enforce SVML
- Compile time dispatching for SVML calls
- Support for the Intel® Xeon Phi™ x100 product family coprocessor (formerly code name Knights Corner) is removed in this release
- All -o* options replaced with -qo* options
- Parallel STL for parallel and vector execution of the C++ STL
- Support of hardware based PGO
- monotonic and overlap keywords for ordered block in simd context
- Change in behavior of extract ( _mm256_extract_epi8 ) intrinsics return type
- Features from OpenMP* TR4 Version 5.0 Preview 1
- Support for more new features in OpenMP* 4.0 or later
- New C++17 features supported
- Adding support for atomic keyword in C11 features
- New and changed compiler options
- 32-bit icc wrapper deprecated in 18.0
- Intel® Cilk™ Plus deprecated in 18.0
- Offline documentation removed from the Installed image
- New /Qopt-zmm-usage
- Correction to reported problems
System Requirements
For an explanation of architecture names, see http://intel.ly/q9JVjE
- A PC based on an Intel® 64 architecture processor supporting the Intel® Streaming SIMD Extensions 2 (Intel® SSE2) instructions (Intel® 2nd Generation or newer Generation of Intel® Core™ i3, i5, or i7 processors and Intel® Xeon® E3 or E5 processor family, or compatible non-Intel processor)
- 2GB of RAM (4GB recommended)
- 7.5GB free disk space for all features
- For offload to or native support for Intel® Graphics Technology development/testing
- The following processor models are supported:
- Intel® Xeon® Processor E3-1285 v3 and E3-1285L v3 (Intel® C226 Chipset) with Intel® HD Graphics P4700
- 5th Generation Intel® Core™ Processors with Intel® Iris™ Pro Graphics, Intel® HD Graphics
- 4th Generation Intel® Core™ Processors with Intel® Iris™ Pro Graphics, Intel® Iris™ Graphics or Intel® HD Graphics 4200+ Series
- The following processor models are supported:
Please note: Intel® Xeon® processors are only supported with the chipsets listed. Intel® Xeon® configurations with other chipsets are not supported. Previous generations of Intel® Core™ processors are not supported. Intel® Celeron and Intel® Atom™ processors are also not compatible.
- The latest 32-bit or 64-bit graphics driver with support for Intel® Graphics Technology (available at the Download Center)
- A version of binutils (specifically 2.24.51.20131210) for Windows (available at http://intel.ly/1fHX7xO)
- Note that after installing binutils, you will need to set your PATH to include the directory containing ld.exe.
- Microsoft Windows 7* (SP1), Microsoft Windows 8*, Microsoft Windows 8.1*, Microsoft Windows 10*, or Microsoft Windows Server 2012 (R2)* (embedded editions not supported) [1]
- On Microsoft Windows 8, Microsoft Windows 8.1, and Microsoft Windows Server 2012, the product installs into the "Desktop" environment. Development of "Windows 8 UI" applications is not supported. [2]
- To use the Microsoft Visual Studio development environment or command-line tools to build IA-32 or Intel® 64 architecture applications, one of:
- Microsoft Visual Studio 2017* Professional Edition (or higher edition) with 'Desktop development with C++' component installed
- Microsoft Visual Studio 2015* Professional Edition (or higher edition) with 'Common Tools for Visual C++ 2015' component installed [3]
- Microsoft Visual Studio Community 2015* with 'Common Tools for Visual C++ 2015' component installed [3]
- Microsoft Visual Studio 2013* Professional Edition (or higher edition) with C++ component installed
- Microsoft Visual Studio Community 2013* with C++ component installed
- To use command-line tools only to build IA-32[1] architecture applications, one of:
- Microsoft Visual C++ Express 2015 for Windows Desktop*
- Microsoft Visual C++ Express 2013 for Windows Desktop*
- To use command-line tools only to build Intel® 64 architecture applications, one of:
- Microsoft Visual C++ Express 2015 for Windows Desktop*
- Microsoft Visual C++ Express 2013 for Windows Desktop*
- To read the on-disk documentation, Adobe Reader* 7.0 or later
Notes
- Applications can be run on the same Windows versions as specified above for development. Applications may also run on non-embedded 32-bit versions of Microsoft Windows earlier than Windows XP, though Intel does not test these for compatibility. Your application may depend on a Win32 API routine not present in older versions of Windows. You are responsible for testing application compatibility. You may need to copy certain run-time DLLs onto the target system to run your application.
- The Intel® C++ Compiler does not support the development of Windows 8* UI apps. We are always interested in your comments and suggestions. For example, if you want to use the Intel® C++ Compiler or other Intel software development capabilities in Windows 8 UI apps, please file a request at Intel® Online Service Center (http://www.intel.com/supporttickets).
- To use the Intel® C++ Compiler with Microsoft Visual Studio 2015*, it is necessary to install the 'Common Tools for Visual C++ 2015' component from Visual Studio. This article explains how.
- This article explains how to use the Intel® C++ Compiler with Microsoft Visual Studio 2017*,
Target Software Requirements
The target platform should be based on one of the following environments:
- Microsoft Windows 10 IoT Core*, Microsoft Windows 10*, Microsoft Windows Embedded 8*, Microsoft Windows Embedded 7*
How to use the Intel® C++ Compiler
Intel® System Studio 2018: Getting started with the Intel® C++ Compiler 18.0 for Windows* at <install-dir>\documentation_2018\en\compiler_c\iss2018\get_started_wc.htm. contains information on how to use the Intel® C++ Compiler from the command line and from Microsoft Visual Studio*.
Documentation
Product documentation is linked from <install-dir>\documentation_2018\en\compiler_c\. Full documentation for all tool components is available at the Intel System Studio Documentation page.
Offline Core Documentation Removed from the Installed Image
Offline core documentation is removed from the Intel® System Studio installed image. The core documentation for the components of Intel® System Studio is available at the Intel® Software Documentation Library for viewing online. You can also download an offline version of the documentation from the Intel® Software Development Products Registration Center: Product List > Intel® System Studio Documentation.
Intel-provided debug solutions
- Please see Intel® System Debugger Support Resources for further information.
Samples
Product samples are now available online at Intel® System Studio Code Samples and Tutorials
Technical Support
If you did not register your compiler during installation, please do so at the Intel® Software Development Products Registration Center at https://lemcenter.intel.com. Registration entitles you to free technical support, product updates and upgrades for the duration of the support term.
For information about how to find Technical Support, Product Updates, User Forums, FAQs, tips and tricks, and other support information, please visit: http://www.intel.com/software/products/support/
Note: If your distributor provides technical support for this product, please contact them for support rather than Intel.
New and Changed Features
The following features are new or significantly enhanced in this version. For more information on these features, please refer to the documentation.
Microsoft Visual Studio 2017* Support
Integration support for Intel® C++ compiler added for Microsoft Visual Studio 2017*. Refer to System Requirements for additional information.
monotonic and overlap keywords for ordered block in simd context
New keywords for existing #pragma omp ordered simd
#pragma omp ordered simd monotonic()#pragma omp ordered simd overlap(expr)#pragma omp simd reduction(=: list)
Please refer the Intel® C++ Compiler 18.0 User and Reference guide for more details
Profile Guided Optimization (PGO) Hardware-based event sampling is a new low overhead model to get (many) benefits of PGO using the Intel® Compiler and the Intel® VTune™ Amplifier. Data collection works on systems where Intel® VTune™ Amplifier is supported.
Please refer the Intel® C++ Compiler 18.0 User and Reference guide for more details
Parallel STL for parallel and vector execution of the C++ STL
Intel(R) C++ Compiler is installed with Parallel STL, an implementation of the C++ standard library algorithms with support for execution policies.
For more information about Parallel STL, see Getting Started and Release Notes .
To learn more, please refer to article https://software.intel.com/en-us/get-started-with-pstl
Change in behavior of extract ( _mm256_extract_epi8 ) instrinics return type
Intel defined 256-bit vector intrinsics _m256_extract_epi8/epi16(__m256i a, const int index) return int instead of __int8/__int16 values.
New option -Qimf-use-svml to enforce SVML
New option forces use of SVML where currently LIBM is used, for scalar math. This guarantees bitwise-same result of computations made with vectorized code vs computations made with scalar code. With this feature the compiler vectorizes math functions in /fp:precise FP model and vectorized code produces results consistent with scalar code results.
CET - Control-Flow Enforcement Technology support
Control-flow Enforcement Technology (CET) defends a program from certain attacks that exploit vulnerabilities, e.g. Return-oriented Programming (ROP) and similarly Call/Jmp-oriented Programming (COP/JOP). Please refer to the Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 1: Basic Architecture for more details.
New compiler option /Qcf-potection[:keyword] introduced in the compiler to support CET.
Compile time dispatching for SVML calls
The compiler default behaviour is changed for SVML functions and a call to cpu-specific SVML entry is performed. Specifying new option -Qimf-force-dynamic-target reverts to the previous behavior and dynamic SVML dispatching is used.
Features from OpenMP* TR4 Version 5.0 Preview 1
Language features for task reductions from the OpenMP* Technical Report 4 : Version 5.0 Preview 1 specifications are now supported.
- TASKGROUP now has the TASK_REDUCTION clause.
- TASK includes now has the IN_REDUCTION clause
- TASKLOOP now has the REDUCTION and IN_REDUCTION clauses
For more information, see the compiler documentation or the link to the OpenMP* Specification above.
Support for more new features from OpenMP* 4.0 or later
- taskloop construct feature
#pragma omp taskloop[clause[[,]clause]..] - Support for #pragma omp for linear (list [ : linear-step ])
- where list is either list or modifier(list)
- Support for ref, val, and uval modifiers for the linear clause
- Examples: linear(ref(p)), linear(val(i):1), linear(uval(j):1)
- Support for #pragma omp simd simdlen(n)
- Support for #pragma omp ordered [simd]
- Reductions over whole arrays: int x[n]; #pragma omp simd reduction(+:x)
- Intel® processor clause extension added to #pragma omp declare simd (proposed; not officially part of OpenMP* 4.5)
- support for clauses
SIMDandNONMONOTONICmodifiers for#pragma omp for schedule :- The Intel® C++ Compiler 17.0 include
SIMDandNONMONOTONICmodifiers extenstion to schedule clause to enhance user control of how interations of the for loop are divided among threads of team. See the Intel® C++ Compiler User’s Guide for more details.
- The Intel® C++ Compiler 17.0 include
- support for array sections as list items in the reduction clause
reduction(reduction-identifier:list)If a list item is an array section, it is treated as if reduction clause is applied to each seperate element of the section. The elements of the private array sections will be allocated contiguously
The Intel® C++ Compiler 18.0 supports the following features under the /Qstd=c++17 (Windows*) or -std=c++17 (Linux*/macOS*) options:
- Static assert with no message (N3928)
- Relaxed Range based for loops ()
- Please see C++17 Features Supported by Intel® C++ Compiler for an up-to-date listing of all supported features, including comparisons to previous major versions of the compiler.
The Intel® C++ Compiler supports the C11 features under the /Qstd=c11 (Windows*) or -std=c11 (Linux*/macOS*) options:
- Support for all C11 features including C11 keyword _Atomic and __attribute((atomic))
- Please see C11 Support in Intel® C++ Compiler for an up-to-date listing of all supported features, including comparisons to previous major versions of the compiler.
New /qopt-zmm-usage option
You can tune the zmm code generation done by the compiler with the new additional option -qopt-zmm-usage:low|high. The argument value of low provides a smooth transition experience from - Intel® Advanced Vector Extensions 2 (Intel® AVX2) ISA to Intel® Advanced Vector Extensions 512 (Intel® AVX-512) ISA on a Intel® Xeon® Platinum processor (formerly code name Skylake), such as for enterprise applications. Tuning for ZMM instruction use via explicit vector syntax such as #pragma omp simd simdlen() is recommended. The argument value of high is recommended for applications, such as HPC codes, that are bounded by vector computation to achieve more compute per instruction through use of the wider vector operations. The default value is low for Skylake server microarchitecture-family compilation targets and high for Intel® Core™ /Intel® Many Integrated Core Architecture (Intel® MIC Architecture) Intel® AVX-512 combined compilation targets.
New and Changed Compiler Options
For details on these and all compiler options, see the Compiler Options section of the Intel® C++ Compiler 18.0 User's Guide.
- All –o* options replaced by –qo* options
All the –o* options deprecated in the previous release have been replaced with –qo* options in this release with one noted exception, there is no change to the –o option for Linux* and macOS* used to name the output file.
On Windows*, this change impacts compiler options passed to the target compilation with the /Qoffload-option Compiler option.
A new diagnostic is issued when any now replaced –o option is used. For example:
$ icc -openmp example.c
icc: command line error: option '-openmp' is not supported. Please use the replacement option '-qopenmp'
Options affected:
-[no-]openmp
-openmp-lib=<arg>
-openmp-link=<arg>
-[no-]openmp-offload
-[no-]openmp-simd
-openmp-stubs
-openmp-threadprivate=<arg>
-openmp-report[=<level>]
-openmp-task=<arg>
-opt-args-in-regs=<arg>
-[no-]opt-assume-safe-padding
-opt-block-factor=<arg>
-[no-]opt-calloc
-[no-]opt-class-analysis
-[no-]opt-dynamic-align
-[no-]opt-gather-scatter-unroll
-[no-]opt-jump-tables=<arg>
-opt-malloc-options=<arg>
-[no-]opt-matmul
-[no-]opt-mem-layout-trans=<arg>
-[no-]opt-multi-version-aggressive
-[no-]opt-prefetch[=<val>]
-opt-prefetch-distance=<arg>
-opt-ra-region-strategy[=<arg>]
-[no-]opt-report-embed
-opt-report-file=<arg>
-opt-report-filter=<arg>
-opt-report-format=<arg>
-opt-report-phase=<arg>
-opt-report-routine=<arg>
/opt-report-help
/opt-report[=<arg>]
/opt-report-per-object
/opt-streaming-cache-evict=<arg>
/opt-streaming-stores=<arg>
/[no-]opt-subscript-in-range
/opt-threads-per-core=<arg>
For a list of deprecated compiler options, see the Compiler Options section of the Intel® C++ Compiler 18.0 User's Guide.
Support Deprecated
Intel® Cilk™ Plus deprecated in 18.0
Intel® Cilk™ Plus is a deprecated feature in the Intel® C++ Compiler 18.0. Prefer to use OpenMP-based syntax for offloading to the processor graphics. For more information see Migrate Your Application to use OpenMP* or Intel® Threading Building Blocks (Intel® TBB) Instead of Intel® Cilk™ Plus
Support for 32-bit icc wrapper deprecated in 18.0
icc: remark #10421: The IA-32 target wrapper binary 'icc' is deprecated. Please use the compiler startup scripts or the proper Intel(R) 64 compiler binary with the '-Qm32' option to target the intended architecture
Support Removed
Support for Microsoft Visual Studio 2012* has been removed in 18.0
Support for installation on IA-32 hosts has been removed
Support for installation on IA-32 hosts has been removed. Support for generating code for 32-bit targets is supported on 64-bit hosts (only) via compiler option /Qm32
Known Limitations
Visual Studio Known Issues
- Intel® C++ compiler integration to Visual Studio 2017* issues
There are different integration issues observed with Microsoft* Visual Studio 2017. Problems are intermittent and not reproducible on every system. We haven't seen integration issues with latest Visual Studio 2017 version 15.3.3. Please refer to https://software.intel.com/en-us/articles/intel-software-development-tools-integration-to-vs2017-issue for details.
- MSVCP90D.dll (or other Microsoft runtime DLL) is missing
There are situations where the sample projects provided (or any Microsoft Visual C++* project potentially) could run into a runtime System Error where the application cannot find a Microsoft Visual Studio* runtime DLL. This is related to manifest files and SXS assemblies potentially missing. The simplest solution is to go to your redist directory for the version of Microsoft Visual Studio* you are using (default location would be c:\program files[ (x86)]\Microsoft Visual Studio X.X\VC\redist). There will be several subdirectories under this location, sorting files out by amd64, x86 or Debug_NonRedist (if you have D in the runtime name, this usually indicates a Debug library found in this folder). Find the appropriate folder that contains the runtime you are looking for, and then copy the entire contents of that folder (including a .manifest file) to the directory where the .exe you are trying to run is located. - Warning #31001:The dll for reading and writing the pdb (for example, mspdb110.dll) could not be found on your path.
When using Microsoft Visual Studio Express*, compilation for IA-32 with -debug (General > Debug Information Format) enabled may result the warning: warning #31001: The dll for reading and writing the pdb (for example, mspdb110.dll) could not be found on your path. This is usually a configuration error. Compilation will continue using /Z7 instead of /Zi, but expect a similar error when you link your program. The warning is expected and occurs because a 64 bit Windows* applications (i.e. the Intel® Fortran compiler) must use 64 bit dlls (https://msdn.microsoft.com/en-us/library/windows/desktop/aa384231(v=vs.85).aspx); however, Microsoft Visual Studio Express* only provides a 32 bit version of mspdb*.dll. The missing 64 bit version leads to the warning. This is a warning-level diagnostic that does not impede successfully building an executable; however, debug information requested is embedded into the object (.obj) file for use with the debugger. No .pdb file is produced by the compiler when /Z7 is enabled.
Some multi-pane documents do not display correctly in the Visual Studio* internal browser
There is a limitation of Visual Studio* internal browser that some multi-pane documents do not display correctly, the table of contents appears in the left pane, but the right pane does not display any content.
Workaround: Access the same documentation from the Visual Studio Help menu.
Missing “Intel System Studio 2018” entry in Help/About for some users
After installation of Intel System Studio 2018 and integration it into Visual Studio 2017, there is no entry “Intel System Studio 2018” in Help/About for all users on the system except the one who installed the package. The issue is planned to be fixed in the next Intel System Studio 2018 release.
Mixed Microsoft* / Intel compilation of 256 vector bit type parameters may generate code that causes an access violation at runtime
A general protection fault caused by an unaligned data access may occur when an application is built using two different compilers - the Microsoft Visual C++ 2013* compiler and the Intel® C++ Compiler 15.0 or above. The problem may arise when 256 vector bit type parameters are passed by reference in a call, when the caller is built with Visual C++*, and the parameters are accessed by functions built with the Intel C++ Compiler.
The problem arises due to a mismatch in the alignment of the 256 vector bit type parameters.
This problem will not occur when the /Qx<code> compiler option is used with <code> equal to AVX or with a newer code value, such as CORE-AVX-I, CORE-AVX2, etc., due to the fact that unaligned access instructions are used in these instances unless __mm256_stream_* (non-temporal data load/store intrinsics) are used explicitly in the application source code.
Disclaimer and Legal Information
| Optimization Notice |
|---|
| Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804 |
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