Intel® Distribution for GDB* Release Notes

ID 763674
Updated 1/29/2024
Version 2024.0.1
Public

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Where to Find the Release

Intel® Distribution for GDB* is available as part of the Intel® oneAPI Base Toolkit. To download the Intel® oneAPI Base Toolkit and learn more about toolkits, visit the Intel® oneAPI Toolkits main page.

Visit Intel® oneAPI Toolkit and Component Versioning Schema for more information about semantic versioning and how it is used with Intel® oneAPI.

Release Notes for Linux* OS

Major Features

  • Multi-target: The debugger can orchestrate multiple targets of different architectures. This feature allows you to debug the "host" portion and the "kernel" of a SYCL* program in the same Intel® Distribution for GDB* session.
  • Auto-attach: The debugger automatically creates an inferior that attaches itself to the Intel® Graphics Technology target to be able to receive events and control the GPU for native debugging.
  • Thread SIMD lanes: The debugger displays SIMD lane information for the GPU threads on the command line interface. You can switch between lanes.
  • Support for debugging a kernel offloaded to a CPU, GPU, or FPGA-emulation device.
  • The debugger is based on the GDB* 13.1 release.

Key Capabilities

  • Support for Intel® Iris® Xe Graphics.
  • Automatically detecting JIT-compiled, or dynamically loaded, kernel code for debugging.
  • Defining breakpoints (both inside and outside of a kernel) to halt the execution of the program.
  • Inspecting and changing the values of variables in the application.
  • Inspecting and changing register values.
  • Listing the threads; switching the current thread context.
  • Listing active SIMD lanes; switching the current SIMD lane context per thread.
  • Evaluating and printing the values of expressions in multiple threads and SIMD lane contexts.
  • Disassembling the machine instructions.
  • Displaying and navigating the function call-stack.
  • Source- and instruction-level stepping.
  • Non-stop and all-stop debug mode.
  • Recording the execution using Intel® Processor Trace (Intel® PT).
  • Printing of Intel® Processor Trace (Intel® PT) PTWRITE payloads in the instruction history and function-call history.
  • Reading and writing Intel® Advanced Matrix Extensions (Intel® AMX) registers.

System Requirements

Documentation

Changes in 2024.0.1 Release 

  • Miscellaneous bug fixes versus 2024.0, no new features 
  • The target ID of a GPU thread is changed to display the Level Zero device thread identifier in the format ZE s.ss.eu.th, where s denotes the slice, ss the subslice, eu the execution unit, and th the thread.
  • The "Execution Mask" (emask) register, which was previously deprecated, is removed.
  • In inferior calls made during expression evaluation on GPUs, all SIMD lanes except the selected lane are disabled.
  • Added a finer control over scheduler locking settings. Check help set scheduler-locking to see the new options.
  • When displaying the PCI location of a GPU device, the domain field is also printed. E.g.: 0000:18:00.0.
  • The registers of a thread on a GPU are defined in three groups: arf, grf, virtual. Use the info reg <group> command to list the registers and their values that belong to a particular group.
  • Performance is enhanced for GPU debugging to improve the debug session startup time and the info threads command in certain scenarios.
  • Added support for defining watchpoints on tagged data pointers (Intel® Linear Address Masking) on CPUs.
  • Various bug fixes, including the following:
    • The non-stop mode can be used on systems with multiple (sub)devices.
    • Fixed an auto-attach problem that was seen when attaching to a running application before the Intel® oneAPI Level Zero backend is initialized.
    • Fixed a problem where a redundant SIGINT event could be shown after a GPU workload has been resumed for stepping.

Known Issues and Limitations

  • Finish/Step/Continue commands might take a long time to complete. Rebooting the machine will resolve those issues. Additionally, try setting those environment variables, if you run into issues
Tab 2 Content
Tab 3 Content
Tab 4 Content
export NEOReadDebugKeys=1
export EnableRecoverablePageFaults=0
export EnableImmediateVmBindExt=1

          These are experimental keys only recommended for debugging purposes and not to be included in production scripts or release packages.

  • For OpenMP* #pragma omp single  blocks in C++, private variables cannot be inspected and breakpoints may occasionally not hit the expected line.
  • During the expression evaluation, an element of an accessor object cannot be accessed using the multi-dimensional access syntax. See an error example below:
(gdb) print anAccessor[5][3][4]
Cannot resolve function operator[] to any overloaded instance
            You can use the id object instead:
(gdb) print workItemId
$1 = cl::sycl::id<3> = {5, 3, 4}
(gdb) print anAccessor[workItemId]
$2 = 1234
  • With kernels older than 5.9, hanging behavior may be seen for devices with id 0x3E98. The GPU can be programmatically reset for recovery.
  • Compilers may emit trampoline functions, which do not exist in the source code, but can be visible in the backtrace and step commands.
On GPU devices:
  • GDB might occasionally return the message "Cannot execute this command while the target is running". Ignore the message as it should not affect further debugging.
  • If you define a breakpoint at a location before a kernel (inside the host code), the breakpoint is also defined at the start of the kernel. This is similar to defining a breakpoint at a comment line or an empty line: in these cases, the breakpoint is defined for the next source line.
  • If the currently selected SIMD lane of a thread becomes inactive, GDB might silently switch the focus to the first active SIMD lane in this thread.
  • Dereferencing sycl::multi_ptr is not supported.
  • Applications that use unified shared memory (USM) may appear as raising a SIGSEGV when a USM-allocated memory is being accessed. This is a mechanism used by the runtime to trigger memory migration. In such cases, sending the signal back to the application resumes the program. For this, use GDB's signal SIGSEGV command.

Release Notes for Windows* OS

Major Features

  • Support for debugging a kernel offloaded to a CPU, GPU, or FPGA-emulation device.
  • Integration into Microsoft Visual Studio* interface to enable GPU remote debugging. This feature allows you to debug the "host" portion and the "kernel" of a SYCL* program in the same VS remote debugging session.

Key Capabilities

  • Inserting a breakpoint inside a kernel and stopping when the breakpoint is hit by a thread
  • Inspecting SIMD lanes
  • Inspecting device informaton
  • Inspecting local variables
  • Source-level stepping
  • Backtracing function calls
  • Examining threads
  • Reading registers
  • Disassembling
  • Automatic launch of gdbserver-ze
  • Support for debugging SYCL* programs
  • Support for debugging OpenMP* C++ kernel code for CPU and GPU offloads.
  • Ability to connect and debug a target outside the domain network.

System Requirements

You can download the latest driver at Intel® Arc™ & Iris® Xe Graphics - WHQL - Windows.

Documentation

To set up the debugger, refer to the Get Started with Debugging SYCL*

Changes in 2024.0.1 Release 

  • Miscellaneous bug fixes versus 2024.0, no new features 
  • Includes performance improvement and bug fixes.
  • Ability to specify custom install directory of oneAPI Base Toolkit.
  • Added the option to filter the stopped threads in Intel® oneAPI GPU Thread window.
  • Fixed Fortran Expression Evaluator (FEE) extension incompatibility issues with Visual Studio 2022 version 17.7.
  • Added int64 array bound support to FEE Visual Studio extension.
  • The "Execution Mask" (emask) register, which was previously deprecated, is removed.

Known Issues and Limitations

On GPU devices:

  • Resizable BAR or Smart Access Memory must be enabled for debugging applications using Intel® Arc™ A-Series Graphics. When disabled, GPU debugging is not possible.
  • With a two-machine setup, when a debugging session is interrupted abruptly during kernel offload to a GPU, there is a possibility that further debugging is not possible. This is often indicated by deployment errors despite the Visual Studio Remote Debugger session running on the target. In this case, restarting the target machine should resolve the issue.
  • Inferior calls (invocation of kernel functions from inside the debugger for expression evaluation) are not supported.
  • If you define a breakpoint at a location before the kernel (inside the host code), the breakpoint is also defined at the start of the kernel. This is similar to defining a breakpoint at a comment line or an empty line: in these cases, the breakpoint is defined for the next source line.

On CPU and GPU devices:

  • For OpenMP #pragma omp single blocks in C++, private variables cannot be inspected and breakpoints may occasionally not hit the expected line.
  • Compilers may emit trampoline functions, which do not exist in the source code, but can be visible when stepping or when examining the call stack.

On FPGA emulator devices:

  • For debugging on FPGA emulator, ahead-of-time (AoT) compilation is not supported. Ensure that in Project Properties > SYCL   Enable FPGA Workflows is set to no.
  • For debugging on an FPGA emulator, no support for OpenMP.

On CPU devices and FPGA emulator devices:

  • In Microsoft Visual Studio*, the following message is displayed on the output window during debugging the kernel offloaded to a CPU/FPGA device. "INTEL_GT_DEBUGGER: (257891284) Unable to execute command. The MIEngine is not currently debugging any process." This can be ignored and should not have any effect on the program execution and further debugging
  • It is recommended to disable the GPU debugger for smooth debugging on CPU and FPGA emulator devices.

Previous oneAPI Releases

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