- Letter from the Editor: Big Announcements at ISC 2021! by Henry A. Gabb, Senior Principal Engineer, Intel Corporation
- Heterogeneous Processing Requires Data Parallelization: SYCL* and DPC++ Are a Good Start
- Analyzing the Performance of Reduction Operations in Data Parallel C++
More on Tuning the Common Reduction Parallel Pattern - OpenMP* Accelerator Offload
Portability Across Heterogeneous Architectures - Optimizing Distributed AI Training Using Intel® oneAPI Toolkits
Incremental Tuning Can Yield Significant Performance Improvements - The Role and Potential of CPUs in Deep Learning
- MiniNAS Neural Architecture Search Using SigOpt and Ray Tune
Systematically Search Model Architectures with SigOpt - Performance Optimizations for End-to-End AI Pipelines
Optimized Frameworks and Libraries for Intel® Processors - Optimizing CatBoost Performance by Up to 4x
Tricks to Improve Machine Learning Training Performance
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