Rising to the challenge of RISC-V software readiness



Photo: Sara L Lockhart-sirman — stock.adobe.com 

The last few years have seen explosive growth in RISC-V silicon and the open standards and specifications backing it, enabling exciting new possibilities and market segments for products.

Software support has impressively kept up, with multiple Linux* distros supporting RISC-V in some shape or form by the end of 2022. Yet industry leaders realized that for successful commercial adoption, there needed to be more organized and collaborative efforts around the quality and quantity of software.

Enter the RISC-V Software Ecosystem (RISE) Project, launched May 31, 2023. Hosted by the Linux Foundation Europe* (LFEU), it’s a collaboration between Andes*, Google*, Intel, Imagination Technologies*, MediaTek*, Nvidia*, Qualcomm Technologies*, Red Hat*, Rivos*, Samsung*, SiFive*, T-Head* and Ventana Micro Systems*.

What’s Up with RISE?

So what’s this impressive list of RISC-V movers and shakers actually doing with RISE? 

The RISE Project focuses on commercial product readiness, key for the adoption of RISC-V technologies in market segments such as mobile, datacenter, consumer electronics, datacenter and automotive. RISE's mission is to accelerate the development of open source software for the RISC-V architecture. Members share a roadmap, technical contributions, staffing and funding for critical projects across a wide set of project categories, such as compilers and toolchains, debug and profiling, Linux distribution integration, firmware, kernel and virtualization, language runtimes, emulators and system libraries. 

Cooperation fosters successful ecosystems working together under one umbrella, for example, enabling RISE members to prioritize projects to unfurl dependencies, to resolve gaps while avoiding duplicate efforts, and to plan beyond the horizon of any single vertical or upstream project. Where possible, RISE members will pool engineering resources. Where needed, work will be funded with reputable third parties with a long-term goal of nurturing self-sustaining RISC-V support within the relevant upstream project communities.  

The RISE Technical Steering Committee (TSC) consists of member company representatives and is responsible for the overall technical direction. This includes defining, tracking and reporting on the roadmap and the prioritized projects, selected from a pool of member proposals. Proposals are binned by category, and further handled in parallel by category-specific Work Groups (WGs), in turn composed of subject matter experts from the member companies. The success of RISE's efforts relies on its Work Groups (WGs) bridging relevant stakeholders outside of RISE, including external task groups.  

RISE addresses logistics and efficiency problems not only for members, but also offers assistance to upstream projects. RISE operates transparently by sharing its objectives and advancements. The upstream projects can perceive RISE as a helpful tool in addressing significant challenges related to RISC-V enablement. RISE solves logistics and efficiency issues not only for its members but aims to be beneficial and complementary to upstream projects. RISE is transparent about its goals and progress, and it should be seen by the upstream as a useful instrument to help solve pressing RISC-V enablement challenges. 

Bolstering Upstream Channels and Last-Mile Support

It's probably worth noting what RISE isn't. RISE isn't in the business of software packaging and distribution, and there won't be "RISE-flavored" releases, repositories of popular open source software, or other siloed or duplicated project infrastructure such as mailing lists or discussion forums. All development and technical discussions are to remain with upstream channels. Although all RISE members are RISC-V International (RVI) members as well, RISE isn't directly involved in RVI specification definitions or the accompanying development work necessary for ratification but will drive any necessary last mile support for upstreaming newly specified features. RISE members are free to propose their own RVI proof-of-concept efforts as RISE projects, for efficiency reasons. In this manner, the RISE Project and RISC-V International are fully complementary to each other. 

Intel is excited to be a part of this new important leg of the RISC-V journey, aligned with our goals of mature and standards-based RISC-V platforms. A good example of our work with the RISE community: MultiArchUefiPkg, a recently launched project to support existing off-the-shelf PCIe adapters by emulating a non-native UEFI firmware environment.  

We look forward to collaborating with our partners on further contributions to developer tools, emulators, kernel support, virtualization and platform firmware. 

About the Author

Andrei Warkentin is a Senior Principal Engineer in the Software and Advanced Technology Group (SATG), focusing on RISC-V systems software and standards, and the current Project RISE Technical Steering Committee (TSC) Chair.