Version: 2021.4
Last Updated: 09/27/2021
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Classes Quick Reference

This appendix contains tables listing operators to perform various SIMD operations, corresponding intrinsics to perform those operations, and the classes that implement those operations. The classes listed here belong to the Intel® C++ Class Libraries for SIMD Operations.

In the following tables,

N/A indicates that the operator is not implemented in that particular class. For example, in the Logical Operations table, the Andnot operator is not implemented in the F32vec4 and F32vec1 classes.

All other entries under Classes indicate that those operators are implemented in those particular classes, and the entries under the Classes columns provide the suffix for the corresponding intrinsic. For example, consider the Arithmetic Operations: Part1 table, where the corresponding intrinsic is

_mm_add_[x]

and the entry epi16 is under the I16vec8 column. It means that the I16vec8 class implements the addition operators and the corresponding intrinsic is

_mm_add_epi16

Logical Operations:

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I128vec1`, `I64vec2`, `I32vec4`, `I16vec8`, `I8vec16`	`I64vec1`, `I32vec2`, `I16vec4`, `I8vec8`	`F64vec2`	`F32vec4`	`F32vec1`
`&, &=`	_mm_and_[x]	`si128`	`si64`	`pd`	`ps`	`ps`
`\|, \|=`	_mm_or_[x]	`si128`	`si64`	`pd`	`ps`	`ps`
`^, ^=`	_mm_xor_[x]	`si128`	`si64`	`pd`	`ps`	`ps`
`Andnot`	_mm_andnot_[x]	`si128`	`si64`	`pd`	N/A	N/A

Arithmetic Operations: Part 1

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I64vec2`	`I32vec4`	`I16vec8`	`I8vec16`
`+, +=`	_mm_add_[x]	`epi64`	`epi32`	`epi16`	`epi8`
`-, -=`	_mm_sub_[x]	`epi64`	`epi32`	`epi16`	`epi8`
`, =`	_mm_mullo_[x]	N/A	N/A	`epi16`	N/A
`/, /=`	_mm_div_[x]	N/A	N/A	N/A	N/A
`mul_high`	_mm_mulhi_[x]	N/A	N/A	`epi16`	N/A
`mul_add`	_mm_madd_[x]	N/A	N/A	`epi16`	N/A
`sqrt`	_mm_sqrt_[x]	N/A	N/A	N/A	N/A
`rcp`	_mm_rcp_[x]	N/A	N/A	N/A	N/A
`rcp_nr`	_mm_rcp_[x] _mm_add_[x] _mm_sub_[x] _mm_mul_[x]	N/A	N/A	N/A	N/A
`rsqrt`	_mm_rsqrt_[x]	N/A	N/A	N/A	N/A
`rsqrt_nr`	_mm_rsqrt_[x] _mm_sub_[x] _mm_mul_[x]	N/A	N/A	N/A	N/A

Arithmetic Operations: Part 2

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I32vec2`	`I16vec4`	`I8vec8`	`F64vec2`	`F32vec4`	`F32vec1`
`+, +=`	_mm_add_[x]	`pi32`	`pi16`	`pi8`	`pd`	`ps`	`ss`
`-, -=`	_mm_sub_[x]	`pi32`	`pi16`	`pi8`	`pd`	`ps`	`ss`
`, =`	_mm_mullo_[x]	N/A	`pi16`	N/A	`pd`	`ps`	`ss`
`/, /=`	_mm_div_[x]	N/A	N/A	N/A	`pd`	`ps`	`ss`
`mul_high`	_mm_mulhi_[x]	N/A	`pi16`	N/A	N/A	N/A	N/A
`mul_add`	_mm_madd_[x]	N/A	`pi16`	N/A	N/A	N/A	N/A
`sqrt`	_mm_sqrt_[x]	N/A	N/A	N/A	`pd`	`ps`	`ss`
`rcp`	_mm_rcp_[x]	N/A	N/A	N/A	`pd`	`ps`	`ss`
`rcp_nr`	_mm_rcp_[x] _mm_add_[x] _mm_sub_[x] _mm_mul_[x]	N/A	N/A	N/A	`pd`	`ps`	`ss`
`rsqrt`	_mm_rsqrt_[x]	N/A	N/A	N/A	`pd`	`ps`	`ss`
`rsqrt_nr`	_mm_rsqrt_[x] _mm_sub_[x] _mm_mul_[x]	N/A	N/A	N/A	`pd`	`ps`	`ss`

Shift Operations: Part 1

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I128vec1`	`I64vec2`	`I32vec4`	`I16vec8`	`I8vec16`
`>>,>>=`	_mm_srl_[x] _mm_srli_[x] _mm_sra__[x] _mm_srai_[x]	N/A N/A N/A N/A	`epi64` `epi64` N/A N/A	`epi32` `epi32` `epi32` `epi32`	`epi16` `epi16` `epi16` `epi16`	N/A N/A N/A N/A
`<<, <<=`	_mm_sll_[x] _mm_slli_[x]	N/A N/A	`epi64` `epi64`	`epi32` `epi32`	`epi16` `epi16`	N/A N/A

Shift Operations: Part 2

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I64vec1`	`I32vec2`	`I16vec4`	`I8vec8`
`>>,>>=`	_mm_srl_[x] _mm_srli_[x] _mm_sra__[x] _mm_srai_[x]	`si64` `si64` N/A N/A	`pi32` `pi32` `pi32` `pi32`	`pi16` `pi16` `pi16` `pi16`	N/A N/A N/A N/A
`<<, <<=`	_mm_sll_[x] _mm_slli_[x]	`si64` `si64`	`pi32` `pi32`	`pi16` `pi16`	N/A N/A

Comparison Operations: Part 1

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I32vec4`	`I16vec8`	`I8vec16`	`I32vec2`	`I16vec4`	`I8vec8`
`cmpeq`	_mm_cmpeq_[x]	`epi32`	`epi16`	`epi8`	`pi32`	`pi16`	`pi8`
`cmpneq`	_mm_cmpeq_[x] _mm_andnot_[y]*	`epi32` `si128`	`epi16` `si128`	`epi8` `si128`	`pi32` `si64`	`pi16` `si64`	`pi8` `si64`
`cmpgt`	_mm_cmpgt_[x]	`epi32`	`epi16`	`epi8`	`pi32`	`pi16`	`pi8`
`cmpge`	_mm_cmpge_[x] _mm_andnot_[y]*	`epi32` `si128`	`epi16` `si128`	`epi8` `si128`	`pi32` `si64`	`pi16` `si64`	`pi8` `si64`
`cmplt`	_mm_cmplt_[x]	`epi32`	`epi16`	`epi8`	`pi32`	`pi16`	`pi8`
`cmple`	_mm_cmple_[x] _mm_andnot_[y]*	`epi32` `si128`	`epi16` `si128`	`epi8` `si128`	`pi32` `si64`	`pi16` `si64`	`pi8` `si64`
`cmpngt`	_mm_cmpngt_[x]	`epi32`	`epi16`	`epi8`	`pi32`	`pi16`	`pi8`
`cmpnge`	_mm_cmpnge_[x]	N/A	N/A	N/A	N/A	N/A	N/A
`cmpnlt`	_mm_cmpnlt_[x]	N/A	N/A	N/A	N/A	N/A	N/A
`cmpnle`	_mm_cmpnle_[x]	N/A	N/A	N/A	N/A	N/A	N/A

* Note that

_mm_andnot_[y]

intrinsics do not apply to the fvec classes.

Comparison Operations: Part 2

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`F64vec2`	`F32vec4`	`F32vec1`
`cmpeq`	_mm_cmpeq_[x]	`pd`	`ps`	`ss`
`cmpneq`	_mm_cmpeq_[x] _mm_andnot_[y]*	`pd`	`ps`	`ss`
`cmpgt`	_mm_cmpgt_[x]	`pd`	`ps`	`ss`
`cmpge`	_mm_cmpge_[x] _mm_andnot_[y]*	`pd`	`ps`	`ss`
`cmplt`	_mm_cmplt_[x]	`pd`	`ps`	`ss`
`cmple`	_mm_cmple_[x] _mm_andnot_[y]*	`pd`	`ps`	`ss`
`cmpngt`	_mm_cmpngt_[x]	`pd`	`ps`	`ss`
`cmpnge`	_mm_cmpnge_[x]	`pd`	`ps`	`ss`
`cmpnlt`	_mm_cmpnlt_[x]	`pd`	`ps`	`ss`
`cmpnle`	_mm_cmpnle_[x]	`pd`	`ps`	`ss`

* Note that

_mm_andnot_[y]

intrinsics do not apply to the fvec classes.

Conditional Select Operations: Part 1

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I32vec4`	`I16vec8`	`I8vec16`	`I32vec2`	`I16vec4`	`I8vec8`
`select_eq`	_mm_cmpeq_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`epi32` `si128` `si128` `si128`	`epi16` `si128` `si128` `si128`	`epi8` `si128` `si128` `si128`	`pi32` `si64` `si64` `si64`	`pi16` `si64` `si64` `si64`	`pi8` `si64` `si64` `si64`
`select_neq`	_mm_cmpeq_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`epi32` `si128` `si128` `si128`	`epi16` `si128` `si128` `si128`	`epi8` `si128` `si128` `si128`	`pi32` `si64` `si64` `si64`	`pi16` `si64` `si64` `si64`	`pi8` `si64` `si64` `si64`
`select_gt`	_mm_cmpgt_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`epi32` `si128` `si128` `si128`	`epi16` `si128` `si128` `si128`	`epi8` `si128` `si128` `si128`	`pi32` `si64` `si64` `si64`	`pi16` `si64` `si64` `si64`	`pi8` `si64` `si64` `si64`
`select_ge`	_mm_cmpge_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`epi32` `si128` `si128` `si128`	`epi16` `si128` `si128` `si128`	`epi8` `si128` `si128` `si128`	`pi32` `si64` `si64` `si64`	`pi16` `si64` `si64` `si64`	`pi8` `si64` `si64` `si64`
`select_lt`	_mm_cmplt_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`epi32` `si128` `si128` `si128`	`epi16` `si128` `si128` `si128`	`epi8` `si128` `si128` `si128`	`pi32` `si64` `si64` `si64`	`pi16` `si64` `si64` `si64`	`pi8` `si64` `si64` `si64`
`select_le`	_mm_cmple_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`epi32` `si128` `si128` `si128`	`epi16` `si128` `si128` `si128`	`epi8` `si128` `si128` `si128`	`pi32` `si64` `si64` `si64`	`pi16` `si64` `si64` `si64`	`pi8` `si64` `si64` `si64`
`select_ngt`	_mm_cmpgt_[x]	N/A	N/A	N/A	N/A	N/A	N/A
`select_nge`	_mm_cmpge_[x]	N/A	N/A	N/A	N/A	N/A	N/A
`select_nlt`	_mm_cmplt_[x]	N/A	N/A	N/A	N/A	N/A	N/A
`select_nle`	_mm_cmple_[x]	N/A	N/A	N/A	N/A	N/A	N/A

* Note that

_mm_andnot_[y]

intrinsics do not apply to the fvec classes.

Conditional Select Operations: Part 2

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`F64vec2`	`F32vec4`	`F32vec1`
`select_eq`	_mm_cmpeq_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`pd`	`ps`	`ss`
`select_neq`	_mm_cmpeq_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`pd`	`ps`	`ss`
`select_gt`	_mm_cmpgt_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`pd`	`ps`	`ss`
`select_ge`	_mm_cmpge_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`pd`	`ps`	`ss`
`select_lt`	_mm_cmplt_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`pd`	`ps`	`ss`
`select_le`	_mm_cmple_[x] _mm_and_[y] _mm_andnot_[y]* _mm_or_[y]	`pd`	`ps`	`ss`
`select_ngt`	_mm_cmpgt_[x]	`pd`	`ps`	`ss`
`select_nge`	_mm_cmpge_[x]	`pd`	`ps`	`ss`
`select_nlt`	_mm_cmplt_[x]	`pd`	`ps`	`ss`
`select_nle`	_mm_cmple_[x]	`pd`	`ps`	`ss`

* Note that

_mm_andnot_[y]

intrinsics do not apply to the fvec classes.

Packing and Unpacking Operations: Part 1

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I64vec2`	`I32vec4`	`I16vec8`	`I8vec16`	`I32vec2`
`unpack_high`	_mm_unpackhi_[x]	`epi64`	`epi32`	`epi16`	`epi8`	`pi32`
`unpack_low`	_mm_unpacklo_[x]	`epi64`	`epi32`	`epi16`	`epi8`	`pi32`
`pack_sat`	_mm_packs_[x]	N/A	`epi32`	`epi16`	N/A	`pi32`
`packu_sat`	_mm_packus_[x]	N/A	N/A	`epi16`	N/A	N/A
`sat_add`	_mm_adds_[x]	N/A	N/A	`epi16`	`epi8`	N/A
`sat_sub`	_mm_subs_[x]	N/A	N/A	`epi16`	`epi8`	N/A

Packing and Unpacking Operations: Part 2

Operators	Corresponding Intrinsic	Classes
Operators	Corresponding Intrinsic	`I16vec4`	`I8vec8`	`F64vec2`	`F32vec4`	`F32vec1`
`unpack_high`	_mm_unpackhi_[x]	`pi16`	`pi8`	`pd`	`ps`	N/A
`unpack_low`	_mm_unpacklo_[x]	`pi16`	`pi8`	`pd`	`ps`	N/A
`pack_sat`	_mm_packs_[x]	`pi16`	N/A	N/A	N/A	N/A
`packu_sat`	_mm_packus_[x]	`pu16`	N/A	N/A	N/A	N/A
`sat_add`	_mm_adds_[x]	`pi16`	`pi8`	`pd`	`ps`	`ss`
`sat_sub`	_mm_subs_[x]	`pi16`	`pi8`	`pi16`	`pi8`	`pd`

Conversions Operations:

Conversion operations can be performed using intrinsics only. There are no classes implemented to correspond to these intrinsics.

Operators	Corresponding Intrinsic
`F64vec2ToInt`	_mm_cvttsd_si32
`F32vec4ToF64vec2`	_mm_cvtps_pd
`F64vec2ToF32vec4`	_mm_cvtpd_ps
`IntToF64vec2`	_mm_cvtsi32_sd
`F32vec4ToInt`	_mm_cvtt_ss2si
`F32vec4ToIs32vec2`	_mm_cvttps_pi32
`IntToF32vec4`	_mm_cvtsi32_ss
`Is32vec2ToF32vec4`	_mm_cvtpi32_ps

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