arch
Tells the compiler which features it may
target, including which instruction sets it may generate.
Syntax
Linux:
None
Windows:
/arch:
code
Arguments
- code
- Indicates to the compiler a feature set that it may target, including which instruction sets it may generate. Many of the following descriptions refer to Intel® Streaming SIMD Extensions (Intel® SSE) and Supplemental Streaming SIMD Extensions (SSSE). Possible values are:
- ALDERLAKEAMBERLAKEBROADWELLCANNONLAKECASCADELAKECOFFEELAKECOOPERLAKEGOLDMONTGOLDMONT-PLUSHASWELLICELAKE-CLIENT(orICELAKE)ICELAKE-SERVERIVYBRIDGEKABYLAKEKNLKNMROCKETLAKESANDYBRIDGESAPPHIRERAPIDSSILVERMONTSKYLAKESKYLAKE-AVX512TIGERLAKETREMONTWHISKEYLAKE
- May generate instructions for processors that support the specified Intel® processor or microarchitecture code name.KeywordICELAKEis deprecated and may be removed in a future release.
- CORE-AVX2
- May generate Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® AVX, SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- CORE-AVX-I
- May generateFloat-16 conversion instructions andthe RDRND instruction, Intel® Advanced Vector Extensions (Intel® AVX), Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- AVX2
- May generate Intel® Advanced Vector Extensions 2 (Intel® AVX2), Intel® AVX, Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- AVX
- May generate Intel® Advanced Vector Extensions (Intel® AVX), Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- SSE4.2
- May generate Intel® SSE4.2, SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- SSE4.1
- May generate Intel® SSE4.1, SSE3, SSE2, SSE, and SSSE3 instructions.
- SSSE3
- May generate SSSE3 instructions and Intel® SSE3, SSE2, and SSE instructions.
- SSE3
- May generate Intel® SSE3, SSE2, and SSE instructions.
- SSE2
- May generate Intel® SSE2 and SSE instructions.
- SSE
- This option has been deprecated; it is now the same as specifyingIA32.
- IA32
- Generates x86/x87 generic code that is compatible with IA-32 architecture. Disables any default extended instruction settings, and any previously set extended instruction settings. It also disables allfeature-specificoptimizations and instructions.This value is only available on IA-32 architecture.
Default
- SSE2
- The compiler may generate Intel® SSE2 and SSE instructions.
Description
This option tells the compiler which features it may
target, including which instruction sets it may generate.
Code generated with these options should execute on any
compatible, non-Intel processor with support for the corresponding instruction
set.
Options
/arch
and
/Qx
are mutually exclusive. If both are specified, the
compiler uses the last one specified and generates a warning.
If you specify both the
/Qax
and
/arch
options, the compiler will not generate Intel-specific
instructions.
IDE Equivalent
Visual Studio:
Code Generation > Enable
Enhanced Instruction Set
Eclipse:
None
Xcode:
None
Alternate Options
None