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Description
This class will teach you how to design with Altera® FPGA SoC FPGAs using the Quartus® Prime software and how to develop software for these devices. It will cover the Hard Processor System (HPS) architecture for Altera SoC FPGAs, including an overview of the Arm* Cortex*-A55 and A77. You will learn to add and configure the processor component in a Platform Designer system. You will then learn to implement and configure the first-stage and second-stage bootloaders (based on U-Boot), and how to build and boot to the Linux* OS. You will learn the boot stages of SDM based SoC FPGAs.At the completion of the course, you will have the knowledge necessary to immediately start using Altera SoC FPGA devices in your own designs or on development kits.