Initial Design Review for Arria® 10 SoC FPGA Designs

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Intel® FPGA Training Catalog Intel® Arria® 10 FPGAs Support Intel® Arria® 10 FPGAs Support Intel® Arria® 10 FPGAs Support Intel® Arria® 10 FPGAs Support

653042
2021-09-08
Public

Description

In this training, you will learn a general process for conducting an initial design review for any FPGA design. Then, we will explore the areas for review for an Arria® 10 SoC FPGA design: HPS Design, Board Design, and Embedded Software Design. The course will follow the checklists and advice offered in the Arria 10 SoC Device Design Guidelines document. Each discussion of a subject area for review will include 3 sections: reference documents, design considerations, and deliverables and actions.

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