Creating Reusable Design Blocks: Introduction to IP Reuse with the Intel® Quartus® Prime Software

Description

This training is part 1 of 3. As FPGA designs get larger and more complicated, intellectual property (IP) is being used more often to help reduce time-to-market. Including IP allows designers to focus on new aspects of their design and improve existing designs instead of spending time recreating what’s been done before. But what if you want to create your own IP? This training is for the IP designer who wants to create high-quality, easily-reusable IP based on Intel’s own methodology for designing reusable IP for use in the Intel® Quartus® Prime software.