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Description
This online course will introduce the clocking resources found in Intel® Agilex™ F-Series and Intel Stratix® 10 MX/TX/DX FPGA E-Tiles. In this course, you will learn about the reference clocks available on the E-tile. Then, you will learn how the E-tile transceiver datapath clocks are generated and distributed. Finally, you will learn how the E-tile transceiver clocks must be connected at the FPGA fabric interface. The goal of the course is to help you understand your use of clocking resources, which can be key to a successful design implementation.