Power Analysis & Optimization for Intel Arria 10 & Stratix 10 Devices: Optimization

Description

This is part 3 of 4. Designing for low-power in today’s high-speed Intel Stratix 10 and Arria 10 FPGA designs is more important than ever. Knowing the final design’s power usage early in the design process is necessary for making power supply and device cooling decisions. This training will give you the knowledge and tools you need to perform highly accurate estimates of power usage and what to do to optimize power. In this third part, you'll learn many different techniques for optimizing a design for power, from simple settings adjustments to perform a power-driven compilation in the Intel Quartus Prime software, to making design changes that affect how the design gets compiled.