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Description
Are you targeting an Intel® Agilex™ 7 FPGA or Intel Stratix® 10 FPGA and wanting to learn how your design can reach the maximum core performance?
This course will give you an introduction to advanced optimization techniques that can be useful when targeting Intel FPGAs equipped with the Intel HyperFlex™ architecture. In this course, you will learn about design practices that limit the effectiveness of Hyper-Retiming and Hyper-Pipelining and about Hyper-Optimization tools and techniques that can be used to to overcome those bottlenecks, unleashing the full potential of the Intel HyperFlex architecture.