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Description
This is part 2 of 2. Designing for low-power in today’s high-speed FPGA designs is more important than ever. Knowing the final design’s power usage early in the design process is necessary for making power supply design and power budgeting decisions. This training will give you the knowledge and tools you need to perform highly accurate estimates of power usage using the Quartus® Prime software. In this second part, now that you know how to perform a power analysis, you’ll see how to use this information to optimize a design to minimize power through the use of power-driven compilation options and through following low power design guidelines.