An Essential Reset for Intel® Stratix® 10 & Intel® Agilex™ Devices

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Intel® FPGA Quick Videos Agilex™ 7 M-Series FPGA and SoC FPGA Support Agilex™ 7 I-Series FPGA and SoC FPGA Support Intel® Stratix® 10 FPGAs and SoC FPGAs Support Intel® Stratix® 10 FPGAs and SoC FPGAs Support

649297
2021-06-28
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Description

The Reset Release Intel® FPGA IP available in the Intel® Quartus Prime Pro software is necessary to use in all Intel Stratix® 10 and Intel Agilex™ devices to hold your design in reset until the FPGAs have finished with the configuration process. In this video, I will go over some of the back ground surrounding the configuration process, design implications of the configuration process, and how to instantiate the Reset Release Intel FPGA IP.

Usage instructions