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Description
This video shows the method to perform chip ID reading by interfacing with AVST interface using Mailbox Avalon® ST Client Intel® FPGA IP in Intel® Agilex™ FPGA. For more information about Mailbox Avalon ST Client Intel® FPGA IP please refer to user guide at link below: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-avst-client-ag.pdf