Security Overview for SDM-Based FPGA Devices

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ID 794424
Date 2/29/2024
Public
Document Table of Contents
Document Table of Contents x
1. FPGA Device Security Overview 2. Device Security Features Overview 3. Device Security Resources 4. Revision History for the Security Overview for SDM-based FPGA Devices
2. Device Security Features Overview x
2.1. Hardware Root of Trust 2.2. Authentication 2.3. Attributes 2.4. Configuration Bitstream Encryption 2.5. Platform Attestation 2.6. Cryptographic Services 2.7. Physical Anti-Tamper Monitoring 2.8. Secure Debug
1. FPGA Device Security Overview
2. Device Security Features Overview
3. Device Security Resources
4. Revision History for the Security Overview for SDM-based FPGA Devices

1. FPGA Device Security Overview

At Altera® , the security of our products is one of our most important priorities. Altera® strives to design and manufacture the world’s most secure technology products and encourages its customers and others in the technology industry to do the same.

Altera® products are designed with dedicated, highly configurable security hardware and firmware. Altera® applies the security development lifecycle across software, firmware, and hardware to develop and maintain more secure products. No product or component can be completely secure.

The first section of this document provides an overview of the security features available on Altera® FPGAs. The second section describes where to find more detailed information as well as implementation instructions for Altera® FPGA security features.

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