Article ID: 000082667 Content Type: Error Messages Last Reviewed: 06/13/2018

Error: rs232_0: The input clock frequency must be known at generation time.

Environment

  • Intel® Quartus® Prime Standard Edition
  • RS232 UART Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Standard edition software v18.0 and earlier, you may see this error message when generating the HDL design file for an RS232 UART IP in IP Parameter Editor.

    Resolution

    To work around this problem, add an RS232 UART instance from IP Catalog in Platform Designer.

    This problem will be fixed in a future release of the Intel® Quartus® Prime Standard edition software. 

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices

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