IntelŪ ItaniumŪ Processor Family Interrupt Architecture Guide

This document is a guide for the Intel® Itanium® architecture Streamlined Advanced Programmable Interrupt Controller (SAPIC). SAPIC is the high performance interrupt architecture for the Intel Itanium architecture. This guide describes the Intel Itanium architecture SAPIC and platform level implementation considerations. It is intended for platform hardware architects (both component and platform) as well as platform software architects (operating system and platform firmware).

File Name/Size:

692099 bytes
Download From:
FTP Server

Web Server (Available for byte serving)