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AbstractSCC is a many-core research chip developed by Intel Labs. It contains a mesh of tiles, two processor cores per tile, off-chip private memory per core, shared off-chip memory, and a shared on-chip message passing buffer. The cores support a general x86 instruction set (P54C), hence we have access to compilers and a stable execution environment for the cores used on the chip. That means we can support full scale application programming on SCC. The programming environment for SCC described in this report is named RCCE: a Small Library for Many-Core Communication. This is a simple message passing environment built on top of a basic one-sided communication system.In this document, we define the RCCE API and provide notes and assumptions used to support its implementation on the SCC chip. We also describe our functional emulator built on top of OpenMP. This emulator lets us develop and test code for SCC without requiring access to actual hardware.Introduction Intel is building a series of research chips to study many-core CPUs, their architecture, and the techniques used to program them. The first of these chips was the now famous “80-core research chip”. The second chip is called the single-chip cloud computer (SCC).The 80-core chip and SCC have much in common. Both are research chips and hence are not included on any product roadmaps. They both use a mesh for the on-die network. In both cases, the cores do not interact through a cache-coherent shared address space; so the native programming models depend on message passing or some other scheme that makes cache coherence explicit.The two chips differ, however, in that the cores used in SCC are general purpose x86 processors. The 80-core chip used a limited, non-IA instruction set, no compiler, and no OS. SCC, on the other hand, has a full IA core (P54C), an operating system (for example, Linux), and multiple compilers. Consequently, while the 80 core chip supported only simple application kernels, SCC supports full application programming.Read the full RCCE: a Small Library for Many-Core Communication Specification.
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